mt9hvf6472rhy-667 Micron Semiconductor Products, mt9hvf6472rhy-667 Datasheet

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mt9hvf6472rhy-667

Manufacturer Part Number
mt9hvf6472rhy-667
Description
512mb, 1gb X72, Ecc, Sr 200-pin Ddr2 Sdram Vlp Sordimm
Manufacturer
Micron Semiconductor Products
Datasheet
Table 1:
DDR2 SDRAM VLP SORDIMM
MT9HVF6472RH – 512MB
MT9HVF12872RH – 1GB
For component data sheets, refer to Micron’s Web site:
Features
• 200-pin, very low profile, small-outline registered
• Fast data transfer rates: PC2-3200, PC2-4200,
• 512MB (64 Meg x 72), 1GB (128 Meg x 72)
• Supports ECC error detection and correction
• V
• V
• JEDEC-standard 1.8V I/O (SSTL_18-compatible)
• Differential data strobe (DQS, DQS#) option
• 4n-bit prefetch architecture
• Multiple internal device banks for concurrent
• Programmable CAS# latency (CL)
• Posted CAS additive latency (AL)
• WRITE latency = READ latency - 1
• Programmable burst lengths: 4 or 8
• Adjustable data-output drive strength
• 64ms, 8,192-cycle refresh
• On-die termination (ODT)
• Serial presence-detect (SPD) with EEPROM
• PLL to reduce system clock line loading
• Gold edge contacts
• Single rank
• I
PDF: 09005aef82882ca3/Source: 09005aef82882c52
HVF9C64_128x72RH.fm - Rev. B 5/08 EN
Speed
Grade
dual in-line memory module (VLP SORDIMM)
PC2-5300, or PC2-6400
operation
2
-80E
-800
-667
-53E
-40E
DD
DDSPD
C temperature sensor
= V
DD
= +3.0V to +3.6V
Q = +1.8V
Key Timing Parameters
Products and specifications discussed herein are subject to change by Micron without notice.
Nomenclature
Industry
PC2-6400
PC2-6400
PC2-5300
PC2-4200
PC2-3200
512MB, 1GB (x72, ECC, SR) 200-Pin DDR2 SDRAM VLP SORDIMM
t
CL = 6
CK
800
Data Rate (MT/s)
CL = 5
800
667
667
www.micron.com
1
CL = 4
533
533
533
533
400
Figure 1:
Notes: 1. Contact Micron for industrial temperature
Options
• Operating temperature
• Package
• Frequency/CAS latency
• PCB height
PCB height: 17.9mm (0.70in)
– Commercial (0°C ≤ T
– Industrial (–40°C ≤ T
– 200-pin DIMM (Pb-free)
– 2.5ns @ CL = 5 (DDR2-800)
– 2.5ns @ CL = 6 (DDR2-800)
– 3.0ns @ CL = 5 (DDR2-667)
– 3.75ns @ CL = 4 (DDR2-533)
– 5.0ns @ CL = 3 (DDR2-400)
– 17.9mm (0.70in)
Micron Technology, Inc., reserves the right to change products or specifications without notice.
2. CL = CAS (READ) latency; registered mode
3. Not recommended for new designs.
CL = 3
module offerings.
will add one clock cycle to CL.
400
400
400
200-Pin VLP SORDIMM (MO-224)
t
(ns)
12.5
RCD
15
15
15
15
A
A
1
2
≤ +85°C)
≤ +70°C)
©2007 Micron Technology, Inc. All rights reserved.
3
(ns)
12.5
t
15
15
15
15
RP
Marking
Features
None
-80E
-53E
-40E
-800
-667
Y
I
(ns)
t
55
55
55
55
55
RC

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mt9hvf6472rhy-667 Summary of contents

Page 1

... MT9HVF12872RH – 1GB For component data sheets, refer to Micron’s Web site: Features • 200-pin, very low profile, small-outline registered dual in-line memory module (VLP SORDIMM) • Fast data transfer rates: PC2-3200, PC2-4200, PC2-5300, or PC2-6400 • 512MB (64 Meg x 72), 1GB (128 Meg x 72) • ...

Page 2

... Parameter Refresh count Row address Device bank address Device page size per bank Device configuration Column address Module rank address Table 3: Part Numbers and Timing Parameters – 512MB Modules Base device: MT47H64M8, Module 2 Part Number Density 512MB MT9HVF6472RH(I)Y-80E__ 512MB MT9HVF6472RH(I)Y-800__ ...

Page 3

Pin Assignments and Descriptions Table 5: Pin Assignments 200-Pin VLP SORDIMM Front Pin Symbol Pin Symbol Pin Symbol Pin Symbol DQ18 101 REF 3 DQ0 53 DQ19 103 105 DQ1 ...

Page 4

... DQS. Although DM pins are input-only, the DM loading is designed to match that of DQ and DQS pins. SCL Input Serial clock: SCL is used to synchronize the presence-detect and temperature sensor data (SSTL_18) transfer to and from the module. SA0–SA1 Input Address inputs: These pins are used to configure the presence-detect and temperature (SSTL_18) sensor devices. ...

Page 5

Functional Block Diagram Figure 2: Functional Block Diagram RS0# DQS0# DQS0 DM0 DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQS1# DQS1 DM1 DQ8 DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 DQS2# DQS2 DM2 DQ16 DQ17 DQ18 DQ19 DQ20 DQ21 ...

Page 6

... DDR2 SDRAM modules incorporate serial presence-detect (SPD). The SPD function is implemented using a 2,048-bit EEPROM. This nonvolatile storage device contains 256 bytes. The first 128 bytes are programmed by Micron to identify the module type and various SDRAM organizations and timing parameters. The remaining 128 bytes of storage are available for use by the customer ...

Page 7

... Electrical Specifications Stresses greater than those listed in Table 7 may cause permanent damage to the module. This is a stress rating only, and functional operation of the module at these or any other conditions above those indicated in each device’s data sheet is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reli- ability ...

Page 8

I Specifications DD Table 9: DDR2 I Specifications and Conditions – 512MB DD Values shown for MT47H64M8 DDR2 SDRAM only and are computed from the values specified in the 512Mb (64 Meg x 8) component data sheet Parameter/Condition Operating one ...

Page 9

Table 10: DDR2 I Specifications and Conditions – 1GB DD Values shown for MT47H128M8 DDR2 SDRAM only and are computed from values specified in the 1Gb (128 Meg x 8) component data sheet Parameter/Condition Operating one bank active-precharge current: t ...

Page 10

Register and PLL Specifications Table 11: Register Specifications SSTU32872 devices or equivalent Parameter Symbol high-level IH DC input voltage DC low-level input voltage AC high-level input ...

Page 11

... Timing and switching specifications for the register listed above are critical for proper oper- ation of the DDR2 SDRAM registered DIMMs. These are meant subset of the param- eters for the specific device used on the module. PDF: 09005aef82882ca3/Source: 09005aef82882c52 HVF9C64_128x72RH.fm - Rev. B 5/08 EN ...

Page 12

... Temperature Sensor The temperature sensor continuously monitors the module’s temperature and can be read back at any time over the I the JEDEC standard JC-42.4. Table 14: Temperature Sensor Specifications All voltages referenced to V Parameter/Condition Supply voltage Average operating supply current Input high voltage: Logic 1; All inputs Input low voltage: Logic 0 ...

Page 13

The interrupt mode allows software to reset EVENT# after a critical temperature threshold has been detected. Threshold points are set in the configuration register by the user. This mode triggers the critical temperature limit and both the MIN and MAX ...

Page 14

Table 16: Temperature Sensor Registers Name Pointer register Capability register Configuration register Alarm temperature upper boundary register Alarm temperature lower boundary register Critical temperature register Temperature register Pointer Register The pointer register selects which of the 16-bit registers is being ...

Page 15

Table 20: Capability Register Bit Descriptions Bit Description 0 Basic capability 1: Has alarm and critical trip point capabilities 1 Accuracy 0: ±2°C over the active range and ±3°C over the monitor range 1: ±1°C over the active range and ...

Page 16

Table 22: Configuration Register Bit Descriptions (continued) Bit Description 6 Alarm window lock bit 0: Alarm trips are not locked and can be changed 1: Alarm trips are locked and cannot be changed 7 Critical trip lock bit 0: Critical ...

Page 17

Temperature Format The temperature trip point registers and temperature readout register use a “2’s complement” format to enable negative numbers. The least significant bit (LSB) is equal to 0.0625°C or 0.25°C, depending on which register is referenced. For example, assuming ...

Page 18

Temperature Register The temperature register is a read-only register that provides the current temperature detected by the temperature sensor. The LSB for this register is 0.0625°C with a resolu- tion of 0.0625°C. The most significant bit (MSB) is 128°C in ...

Page 19

Serial Presence-Detect Table 29: Serial Presence-Detect EEPROM DC Operating Conditions All voltages referenced to V Parameter/Condition Supply voltage with temperature sensor option Input high voltage: Logic 1; All inputs Input low voltage: Logic 0; All inputs Output low voltage: I ...

Page 20

... Number of SPD bytes used by Micron 1 Total number of bytes in SPD device 2 Fundamental memory type 3 Number of row addresses on assembly 4 Number of column addresses on assembly 5 DIMM height and module ranks 6 Module data width 7 Reserved 8 Module voltage interface levels t 9 SDRAM cycle time, CK (CL = MAX value, see byte 18) ...

Page 21

... MIN row precharge time, 28 MIN row active-to-row active, 29 MIN RAS#-to-CAS# delay, 30 MIN active-to-precharge time, RAS# 31 Module rank density 32 Address and command setup time, 33 Address and command hold time, 34 Data/data mask input setup time, 35 Data/data mask input hold time, ...

Page 22

... Description 62 SPD revision 63 Checksum for bytes 0–62 64 Manufacturer’s JEDEC ID code 65–71 Manufacturer’s JEDEC ID code 72 Manufacturing location 73–90 Module part number (ASCII) 91 PCB identification code 92 Identification code (continued) 93 Year of manufacture in BCD 94 Week of manufacture in BCD 95–98 Module serial number 99–127 Reserved for manufacturer-specific data 128– ...

Page 23

... TYP 63.60 (2.504) TYP BACK VIEW U9 U10 U11 4.2 (0.165) TYP 47.4 (1.87) TYP ® their respective owners. 23 Module Dimensions U7 18.00 (0.708) 17.80 (0.701) 10.0 (0.394) TYP TYP PIN 199 U12 PIN 2 11.4 (0.45) TYP 16.25 (0.64) TYP Micron Technology, Inc., reserves the right to change products or specifications without notice. ©2007 Micron Technology, Inc. All rights reserved. ...

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