hys64d16020gd Infineon Technologies Corporation, hys64d16020gd Datasheet - Page 8
![no-image](/images/no-image-200.jpg)
hys64d16020gd
Manufacturer Part Number
hys64d16020gd
Description
Unbuffered Ddr Sdram So Modules
Manufacturer
Infineon Technologies Corporation
Datasheet
1.HYS64D16020GD.pdf
(22 pages)
2
Table 3
Symbol
A0 - A11
BA0, BA1
DQ0 - DQ63
CB0 - CB7
RAS, CAS, WE
CKE0 - CKE1
DQS0 - DQS8
CK0 - CK2,
CK0 - CK2
DM0 - DM8
DQS9 - DQS17
S0, S1
V
V
V
V
V
V
SCL
SDA
SA0 - SA2
NC
1) I: Input; O: Output; I/O: bidirectional In-/Output; AI: Analog Input; PWR: Power Supply; GND: Signal Ground; NC: Not
Note: S1 and CKE1 are used on two rank modules only
Data Sheet
DD
SS
DDQ
DDID
REF
DDSPD
Connected
Pin Configuration
Pin Definitions and Functions
Type
I
I
I/O
I/O
I
I
I/O
I
I
I
I/O
I
PWR
GND
PWR
PWR
AI
PWR
I
I/O
I
NC
1)
Function
Data Input/Output
Check Bits (×72 organization only)
Clock Enable
SDRAM low data strobes
SDRAM clock (positive lines)
Serial bus data line
Not Connected
Address Inputs
Bank Selects
Command Inputs
SDRAM clock (negative lines)
SDRAM low data mask/
high data strobes
Chip Selects for Rank0 and Rank1
Power (+2.5 V)
Ground
I/O Driver power supply
VDD Indentification flag
I/O reference supply
Serial EEPROM power supply
Serial bus clock
slave address select
8
Unbuffered DDR SDRAM SO Modules
HYS64D16020GD(L)-[7/8]-A
11042003-YIV7-VK6M
Rev. 1.02, 2004-01
Pin Configuration