hys64v64220gbdl Infineon Technologies Corporation, hys64v64220gbdl Datasheet - Page 9

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hys64v64220gbdl

Manufacturer Part Number
hys64v64220gbdl
Description
So-dimm Sdram Modules
Manufacturer
Infineon Technologies Corporation
Datasheet
Notes
1. For proper power-up see the operation section of the component sheet.
2. AC timing tests
3. If clock rising time is longer than 1 ns, a time (
4. If
5. These parameter account for the number of clock cycles and depend on the operating frequency
6. Access time from clock
7. It is recommended to use two clock cycles between the last data-in and the precharge command
8. When a Write command with AutoPrecharge has been issued, a time of tdal(min) has be fullfilled
9. All AC characteristics shown are for SDRAM components. An initial pause of 100µs is required
10. AC timing tests have V
Infineon Technologies
the 1.4 V crossover point. The transition time is measured between
measurements assume
t
with an input signal of 1V / ns edge rate between 0.8 V and 2.0 V.
of the clock, as follows: the number of clock cycles = specified value of timing period (counted in
fractions as a whole number)
Data out hold time
in case of a write command without Auto-Precharge. One clock cycle between the last data-in
and the precharge command is also supported, but restricted to cycle times tck greater or equal
the specified twr value, where tck is equal to the actual system clock time
before the next Activate Command can be applied. For each of the terms, if not already an
integer, round up to the next highest integer. tck is equal to the actual system clock time.
after power-up, then a Precharge All Banks command must be given followed by 8 Auto Refresh
(CBR) cycles before the Mode Register Set Operation can begin.
point. The transition time is measured between V
AC
C L O C K
IN P U T
O U T P U T
t
T
and
is longer than 1 ns, a time (
t
IS
t
OH
1 .4 V
parameters are measured with a 50 pF only, without any resistive termination and
for LV-TTL versions
t
t
L Z
IH
t
OH
t
AC
il
is 1.8 ns for PC133 components with no termination and 0 pF load.
t
t
= 0.4 V and V
AC
T
1 .4 V
t
C L
= 1 ns with the AC output load circuit shown in figure below. Specified
is 4.6 ns for PC133 components with no termination and 0 pF load,
t
T
have
t
t
− 1) ns has to be added to this parameter.
O H
C H
t
T
t
t
A C
H Z
ih
V
2.4 V
0.4 V
= 2.4 V with the timing referenced to the 1.4 V crossover
IL
= 0.4 V and
IO.vsd
9
t
T
1.4 V
144 pin SO-DIMM SDRAM Modules
/2 − 0.5) ns has to be added to this parameter.
ih
and V
HYS64V64220GBDL-7/7.5/8-D
V
il
IH
. All AC measurements assume t
= 2.4 V with the timing referenced to
Measurement conditions for
I/O
t
AC
V
IH
and
and
50 pF
t
OH
V
2002-08-06
IL
. All AC
T
=1ns

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