mt9v034c12stmdes aptina, mt9v034c12stmdes Datasheet - Page 36
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mt9v034c12stmdes
Manufacturer Part Number
mt9v034c12stmdes
Description
1/3-inch Wide-vga Cmos Digital Image Sensor
Manufacturer
aptina
Datasheet
1.MT9V034C12STMDES.pdf
(82 pages)
- Current page: 36 of 82
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Table 9:
PDF: 09005aef8366edcb/Source: 09005aef8366ede5
MT9V034_DS - Rev. A 10/08 EN
0x7F (127) Digital Test Pattern
0x80 (128) - 0x98 (152) Tiled Digital Gain
See “Digital Gain” on page 58, for 0x99 (153) – 0xA4 (164) detailed descriptions.
0x99 (153) Digital Tile Coordinate 1 - X-direction
0x9A (154) Digital Tile Coordinate 2 - X-direction
12:11 Gray Shade Test
11:8
9:0
3:0
7:4
9:0
Bit
10
13
14
Two-wire Serial
Interface Test
Data
Use Two-wire
Serial Interface
Test Data
Pattern
Test Enable
Flip Two-Wire
Serial Interface
Test Data
Tile Gain
Context A
Sample Weight
Tile Gain Context
B
X
0/5
Bit Name
Register Descriptions (continued)
The 10-bit test data in this register is used in place of
the data from the sensor. The data is inserted at the
beginning of the digital signal processing. Both test
enable (bit 13) and use two-wire serial interface (bit
10) must be set.
0 = Use Gray Shade Test Pattern as test data.
1 = Use Two-wire Serial Interface Test Data (bits 9:0)
as test data.
0 = None.
1 = Vertical Shades.
2 = Horizontal Shades.
3 = Diagonal Shade.
When bits (12:11)
shaded test pattern to be used as digital test data.
Ineffective when Use Two-wire Serial Interface Test
Data (bit 10) is set.
Enable the use of test data/gray-shaded test pattern
in the signal chain.
The data will be inserted instead of data from the
ADCs. When using this mode, disable Row Noise
Correction (Reg0x70 bit 0 and bit 8). If Row Noise
Correction is enabled, the row-wise correction
algorithm will process the test data values and the
result will not be accurate.
Use only when bit 10 is set.
When set, the Two-Wire Test Data (bits 9:0) will be
used in place of the data from ADC/memory on odd
columns, while complement of the same data will be
used on even columns.
Tile Digital Gain = Bits (3:0) * 0.25
See “Digital Gain” on page 58 for additional
information.
To indicate the weight of individual tile used in the
automatic gain/exposure control algorithm.
See “Automatic Gain Control and Automatic
Exposure Control” on page 61 for additional
information.
Tile Digital Gain = Bits (3:0) * 0.25
See “Digital Gain” on page 58 for additional
information.
The starting x-coordinate of digital tiles X0_*.
≠
Bit Description
Aptina Confidential and Proprietary
0, the MT9V034 generates a gray
36
MT9V034: 1/3-Inch Wide-VGA Digital Image Sensor
Default in
Hex (Dec)
000
(15)
000
(4)
(4)
(0)
Aptina Imaging reserves the right to change products or specifications without notice.
0
0
0
0
4
F
4
Shadowed
N
N
N
N
N
Y
Y
Y
Y
©2008 Aptina Imaging Corporation. All rights reserved.
0–1023
Values
0–752
Legal
(Dec)
1–15
1–15
1–15
0–3
0, 1
0, 1
0, 1
Registers
Read/
Write
W
W
W
W
W
W
W
W
W
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