mt9lsdt872g-133 Micron Semiconductor Products, mt9lsdt872g-133 Datasheet - Page 12

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mt9lsdt872g-133

Manufacturer Part Number
mt9lsdt872g-133
Description
8, 16 Meg X 72 Registered Sdram Dimms
Manufacturer
Micron Semiconductor Products
Datasheet
I
(Notes: 1-4) (V
NOTE: 1. All voltages referenced to V
8, 16 Meg x 72 PC133/PC100 Registered SDRAM DIMMs
ZM28_3.p65 – Rev. 4/00
DD
PARAMETER/CONDITION
OPERATING CURRENT: Active Mode;
Burst = 2; READ or WRITE;
STANDBY CURRENT: Power-Down Mode;
CKE = LOW; All banks idle
STANDBY CURRENT: Active Mode; S0#, S2# = HIGH;
CKE = HIGH;All banks active after
No accesses in progress
OPERATING CURRENT: Burst Mode; Continuous burst;
READ or WRITE; All banks active; CAS latency = 3
AUTO REFRESH CURRENT: CKE = HIGH;
S0#, S2# = HIGH
SELF REFRESH CURRENT: CKE ≤ 0.2V
SPECIFICATIONS AND CONDITIONS
10. Enables on-chip refresh and address counters.
2. An initial pause of 100µs is required after power-up, followed by two AUTO REFRESH commands, before proper device
3. AC timing and I
4. I
5. I
6. The I
7. Address transitions average one transition every two clocks.
8.
9. Other input signals are allowed to transition no more than once every two clocks and are otherwise at valid V
operation is ensured. The two AUTO REFRESH command wake-ups should be repeated any time the
requirement is exceeded.
transition time is longer than 1ns, then the timing is referenced at V
crossover point.
outputs open.
slower as the CAS latency is reduced.
t
levels.
DD
DD
CK = 7ns for -13E;
is dependent on output loading and cycle rates. Specified values are obtained with minimum cycle time and the
specifications are tested after the device is properly initialized.
DD
DD
current will decrease as the CAS latency is reduced. This is due to the fact that the maximum cycle rate is
= +3.3V ±0.3V)
DD
t
RC =
test have V
t
CK = 7.5ns for -133;
t
RC (MIN); CAS latency = 3
t
RCD met;
SS
IL
.
= 0V and V
t
t
RC =
RC = 15.625µs;
t
CK = 10ns for -10E.
CL = 3
CL = 3
t
IH
RC (MIN);
= 3V, with timing referenced to 1.5V crossover point. If the input
12
SYMBOL
I
I
I
I
I
I
I
DD
DD
DD
DD
DD
DD
DD
1
2
3
4
5
6
7
128MB
128MB
128MB
128MB
128MB
128MB
128MB
64MB
64MB
64MB
64MB
64MB
64MB
64MB
REGISTERED SDRAM DIMMs
SIZE
IL
(MAX) and V
Micron Technology, Inc., reserves the right to change products or specifications without notice.
1,125
1,440
1,350
1,485
2,070
2,970
-13E
405
450
18
18
27
27
18
9
IL
MAX
(MIN) and no longer at the 1.5V
1,035
1,350
1,260
1,350
1,890
2,790
-133
405
450
18
18
27
27
18
9
8, 16 MEG x 72
1,260
1,080
1,710
2,430
1,260
-10E
855
315
360
18
18
27
27
18
9
t
REF refresh
UNITS NOTES
©1999, Micron Technology, Inc.
mA
mA
mA
mA
mA
mA
mA
ADVANCE
IH
5, 6, 7,
or V
5, 6,
5, 7,
5, 6,
7, 8
8, 9
7, 8
8, 9
10
8
IL

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