ws57c256f STMicroelectronics, ws57c256f Datasheet
ws57c256f
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ws57c256f Summary of contents
Page 1
... The WS57C256F is available in a variety of package types including the space saving 300 Mil DIP, the surface mount PLDCC, and other windowed and non-windowed options. And its standard JEDEC EPROM pinouts provide for automatic upgrade density paths for current 64K and 128K EPROM users ...
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... WS57C256F ABSOLUTE MAXIMUM RATINGS* Storage Temperature............................–65° 150°C Voltage on any Pin with Respect to Ground ....................................–0.6V to +7V V and A with Respect to Ground ......–0. 14V PP 9 ESD Protection .................................................. OPERATING RANGE RANGE TEMPERATURE Commercial 0°C to +70°C Industrial –40°C to +85°C Military – ...
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... A.C. TESTING INPUT/OUTPUT WAVEFORM 3.0 2.0 0.8 0.0 A.C. testing inputs are driven at 3.0 V for a logic "1" and 0.0 V for a logic "0." Timing measurements are made at 2.0 V for a logic "1" and 0.8 V for a logic "0". WS57C256F MAX UNITS 2.0 TEST POINTS ...
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... WS57C256F PROGRAMMING INFORMATION DC CHARACTERISTICS SYMBOLS Input Leakage Current Supply Current During Programming Pulse (CE/ PGM = Supply Current (Note Output Low Voltage During Verify mA) OL Output High Voltage During Verify –4 mA) OH NOTE must be applied either coincidentally or before ...
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... NOTE: 11. The actual part marking will not include the initials "WS." * SMD product. See section 4 for DESC SMD number. PROGRAMMING/ALGORITHMS/ERASURE/PROGRAMMERS The WS57C256F is programmed using Algorithm D shown on page 5-9. When using Data I/O programmers, algorithm 57C256FB is recommended for use with the WS57C256F for best programming results. Return to Main Menu ...