afbr-53d3 Avago Technologies, afbr-53d3 Datasheet - Page 10
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afbr-53d3
Manufacturer Part Number
afbr-53d3
Description
Rohs Compliant 850 Nm Vcsel 1x9 Fiber Optic Transceivers For Fibre Channel
Manufacturer
Avago Technologies
Datasheet
1.AFBR-53D3.pdf
(16 pages)
Figure 3. Recommended Gigabit/sec Ethernet AFBR-53D3 Fiber-Optic Transceiver and HDMP-1536A/1546A SERDES Integrated Circuit
Transceiver Interface and Power Supply Filter Circuits.
Figure 4. Recommended Board Layout Hole Pattern.
10
(8X) 2.54
20.32
0.800
0.100
NOTES:
*C8 IS AN OPTIONAL BYPASS CAPACITOR FOR ADDITIONAL LOW-FREQUENCY NOISE FILTERING.
USE SURFACE-MOUNT COMPONENTS FOR OPTIMUM HIGH-FREQUENCY PERFORMANCE.
USE 50
LOCATE 50
PRE-
AMPLIFIER
MICROSTRIP OR STRIPLINE FOR SIGNAL PATHS.
TRANSCEIVER
CIRCUIT
DRIVER
TERMINATIONS AT THE INPUTS OF RECEIVING UNITS.
LASER
FIBER-OPTIC
AFBR-53D3
0.800
20.32
SIGNAL
DETECT
CIRCUIT
POST-
AMPLIFIER
INPUT
PECL
TOP VIEW
V
V
V
V
CCR
RD+
CCT
EER
EET
TD+
RD-
TD-
SD
0.1 µF
9
8
7
6
5
4
3
2
1
(9X) ø
(2X) ø
C5
Ø0.000
Ø0.000
C2
0.1 µF
C1
0.1
µF
0.032 ± 0.004
0.075 ± 0.004
270
R9
R4
191
R11
270
0.8 ± 0.1
1.9 ± 0.1
R3
68
M
M
+
C8*
10 µF*
A
A
R1
191
R10
270
R2
68
C10
1 µH
1 µH
C9
L2
L1
TO SIGNAL DETECT (SD)
INPUT AT UPPER-LEVEL-IC
5 V dc
0.01 µF
0.01 µF
–A–
C12
C11
C3
0.1
µF
50
50
0.01 µF
0.01 µF
5 V dc
+
C4
10
µF
R13
150
R14
100
50
50
R12
150
V
TD+
TD-
RD-
RD+
SEE HDMP-1536A/-1546A DATA SHEET FOR
DETAILS ABOUT THIS TRANSCEIVER IC.
CC2
V
SERIAL/DE-SERIALIZER
OUTPUT
EE2
INPUT
BUFFER
DRIVER
HDMP-1536A/-1546A
(SERDES - 10 BIT
TRANSCEIVER)
SYNTHESIS
RECOVERY
TO SERIAL
SERIAL TO
PARALLEL
PARALLEL
CIRCUIT
CIRCUIT
CIRCUIT
CIRCUIT
+
CLOCK
CLOCK
3.3 V dc
GND