m54hc138k1 STMicroelectronics, m54hc138k1 Datasheet
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m54hc138k1
Manufacturer Part Number
m54hc138k1
Description
3 To 8 Line Decoder Inverting
Manufacturer
STMicroelectronics
Datasheet
1.M54HC138K1.pdf
(9 pages)
DESCRIPTION
The M54HC138 is an high speed CMOS 3 TO 8
LINE DECODER fabricated with silicon gate
C
PIN CONNECTION
March 2004
2
MOS technology.
HIGH SPEED:
t
LOW POWER DISSIPATION:
I
HIGH NOISE IMMUNITY:
V
SYMMETRICAL OUTPUT IMPEDANCE:
|I
BALANCED PROPAGATION DELAYS:
t
WIDE OPERATING VOLTAGE RANGE:
V
PIN AND FUNCTION COMPATIBLE WITH
54 SERIES 138
SPACE GRADE-1: ESA SCC QUALIFIED
50 krad QUALIFIED, 100 krad AVAILABLE ON
REQUEST
NO SEL UNDER HIGH LET HEAVY IONS
IRRADIATION
DEVICE FULLY COMPLIANT WITH
SCC-9408-046
PD
CC
PLH
OH
NIH
CC
= 13ns (TYP.) at V
= 4 A(MAX.) at T
| = I
(OPR) = 2V to 6V
= V
t
PHL
OL
NIL
= 4mA (MIN)
= 28% V
RAD-HARD 3 TO 8 LINE DECODER (INVERTING)
CC
A
CC
=25°C
(MIN.)
= 6V
ORDER CODES
If the device is enabled, 3 binary select inputs (A,
B, and C) determine which one of the outputs will
go low. If enable input G1 is held low or either G2A
or G2B is held high, the decoding function is
inhibited and all the 8 outputs go high. Three
enable inputs are provided to ease cascade
connection and application of address decoders
for memory systems.
All inputs are equipped with protection circuits
against static discharge and transient excess
voltage.
PACKAGE
DILC
FPC
DILC-16
M54HC138D
M54HC138K
FM
M54HC138
FPC-16
M54HC138D1
M54HC138K1
EM
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