m366s3253bts Samsung Semiconductor, Inc., m366s3253bts Datasheet - Page 8

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m366s3253bts

Manufacturer Part Number
m366s3253bts
Description
32mx64 Sdram Dimm Based On 32mx8, 4banks, 8k Refresh, 3.3v Synchronous Drams With Spd
Manufacturer
Samsung Semiconductor, Inc.
Datasheet
M366S3253BTS
AC CHARACTERISTICS
REFER TO THE INDIVIDUAL COMPONENET, NOT THE WHOLE MODULE.
Notes :
CLK cycle time
CLK to valid
output delay
Output data
hold time
CLK high pulse width
CLK low pulse width
Input setup time
Input hold time
CLK to output in Low-Z
CLK to output
in Hi-Z
1. Parameters depend on programmed CAS latency.
2. If clock rising time is longer than 1ns, (tr/2-0.5)ns should be added to the parameter.
3. Assumed input rise and fall time (tr & tf) = 1ns.
If tr & tf is longer than 1ns, transient time compensation should be considered,
i.e., [(tr + tf)/2-1]ns should be added to the parameter.
Parameter
CAS latency=3
CAS latency=3
CAS latency=3
CAS latency=3
(AC operating conditions unless otherwise noted)
Symbol
t
t
t
t
t
t
SAC
t
t
t
SLZ
SLZ
CC
OH
CH
CL
SS
SH
Min
7.5
3.0
2.5
2.5
1.5
0.8
1
-
tCC=7.5ns
1000
Max
5.4
5.4
-75
PC133 Unbuffered DIMM
Min
3.0
3.0
3.0
10
2
1
1
-
tCC=10ns
1000
Max
6.0
6.0
REV. 0.1 July. 2000
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
Note
1,2
1,2
1
3
3
3
3
2

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