k4r881869m Samsung Semiconductor, Inc., k4r881869m Datasheet - Page 22

• Manufacturer Part Number: k4r881869m
• Description: 288mbit Rdram 512k X 18 Bit X 2*16 Dependent Banks Direct Rdramtm
• Manufacturer: Samsung Semiconductor, Inc.

K4R881869M
Read Transaction - Example
Figure 15 shows an example of a read transaction. It begins
by activating a bank with an ACT a0 command in an ROWA
packet. A time t
COLC packet. Note that the ACT command includes the
device, bank, and row address (abbreviated as a0) while the
RD command includes device, bank, and column address
(abbreviated as a1). A time t
read data dualoct Q(a1) is returned by the device. Note that
the packets on the ROW and COL pins use the end of the
packet as a timing reference point, while the packets on the
DQA/DQB pins use the beginning of the packet as a timing
reference point.
A time t
second is issued. It contains a RD a2 command. The a2
address has the same device and bank address as the a1
address (and a0 address), but a different column address. A
time t
dualoct Q(a2) is returned by the device.
Next, a PRER a3 command is issued in an ROWR packet on
the ROW pins. This causes the bank to precharge so that a
different row may be activated in a subsequent transaction or
so that an adjacent bank may be activated. The a3 address
CTM/CFM
COL4
DQA8..0
DQB8..0
ROW2
..COL0
..ROW0
CAC
CC
after the second RD command a second read data
after the first COLC packet on the COL pins a
T
RCD
Transaction a: RD
Transaction b: xx
0
ACT a0
T
1
T
later a RD a1 command is issued in a
2
T
3
T
4
T
5
CAC
T
6
T
t
7
RCD
after the RD command the
T
8
b0 = {Da,Ba,Rb}
a0 = {Da,Ba,Ra}
T
9
RD a1
T
10
T
11
Figure 15: Read Transaction Example
T
12
T
13
RD a2
T
t
14
CC
T
t
15
t
CAC
RAS
T
16
T
17
a1 = {Da,Ba,Ca1}
T
18
T
19
Page 20
t
T
RC
20
T
t
t
21
CAC
RDP
Q (a1)
includes the same device and bank address as the a0, a1, and
a2 addresses. The PRER command must occur a time t
or more after the original ACT command (the activation
operation in any DRAM is destructive, and the contents of
the selected row must be restored from the two associated
sense amps of the bank during the t
command must also occur a time t
RD command. Note that the t
than the t
example reads two dualocts, but there is actually enough
time to read three dualocts before t
parameter rather than t
packet with PRER would need to shift right (be delayed) by
one t
Finally, an ACT b0 command is issued in an ROWR packet
on the ROW pins. The second ACT command must occur a
time t
or more after the PRER command. This ensures that the
bank and its associated sense amps are precharged. This
example assumes that the second transaction has the same
device and bank address as the first transaction, but a
different row address. Transaction b may not be started until
transaction a has finished. However, transactions to other
banks or other devices may be issued during transaction a.
T
22
T
23
T
CYCLE
PRER a3
24
RC
T
25
Q (a2)
or more after the first ACT command and a time t
T
RDP,MIN
26
a2 = {Da,Ba,Ca2}
T
(note - this case is not shown).
27
T
28
T
29
T
specification in Table 22. This transaction
30
T
t
31
RP
T
RAS
32
ACT b0
T
33
. If four dualocts were read, the
T
34
T
RDP
35
Preliminary
Direct RDRAM
Rev. 0.9 Jan. 2000
T
36
a3 = {Da,Ba}
T
value shown is greater
RDP
37
RDP
RAS
T
38
T
or more after the last
becomes the limiting
39
interval). The PRER
T
40
T
41
T
42
T
43
T
44
T
45
T
RAS
46
T
47
RP
™