r8a66174sp Renesas Electronics Corporation., r8a66174sp Datasheet - Page 3

• Manufacturer Part Number: r8a66174sp
• Description: Parallel-in Serial-out Data Buffer With Fifo
• Manufacturer: Renesas Electronics Corporation.

R8A66174SP
BASIC OPERATION
Fig. 1 shows the basic operation flowchart. Data
inputs D0~D7 are switched among four commands
and 8-bit parallel data by the C//D signal. When
C//D is 1, the command is stored in sync with the
rise of /WR.
For initiate to work this IC, at first command 1
should be stored. Command 1 sets the division ratio
for clock input Φ as 5 divisions of 1, 1/2, 1/4, 1/8
and 1/16. (The default ratio is 1.)
Then command 2 should be stored. When it is
stored, 8-bit parallel data is written into the internal
memory (FIFO) on the write cycle of the CPU. The
maximum capacity of its FIFO is 63 bytes.
When the write operation has done, command 3
should be stored. For this action, all data in the
internal memory is outputted as serial data (SDATA)
in sync with the shift clock (SCLK output) which is
set by command 1. Then, each data is outputted
from LSB.
The SDATA changes on the fall of SCLK. When it
finishes to output data, an interrupt request /INT is
outputted to the CPU.
/INT is canceled by command 4 or command 2 and
command 3. The command 4 sets/resets two
control ports (LATCH, /OE) as well as canceling
/INT. If command 3 is executed without executing
command 2 after command 4, the already written-in
data can be re-outputted. If it is not required to
re-output the previous data, please execute
command 2 before command 3 will be executed.
<Attention>
REJ03F0278-0101 Rev.1.01 Oct.06.2008
Page 3 of 11
In spite of having stored write mode by command
2, when serial out mode is stored by command 3,
without writing any parallel data to an internal
memory (FIFO), an incorrect output appears in
SDATA, SCLK, and /INT.
Please be careful.
(
command 2 store
Please avoid such usage. )
data is not written
command 3 store :
Repeat output
Interrupt
others
C/D=1
C/D=1
C/D=0
C/D=1
C/D=1
C/D=1
from
C/D=1
Fig. 1 Flowchart (Basic operation)
YES
(Cancel interrupt request)
Division ratio setting
Cancel LATCH, OE
Interrupt request out
Command 1 store
Command 2 store
1 w rite cycle/byte
Command 3 store
Command 4 store
Command 4 store
Command 4 store
SERIAL OUTPUT
LATCH output
Write operation
YES
YES
Repeat data
OE output
output?
Reset
End?
End?
NO
(MAX : 63 Byte)
NO
NO