k4b2g0846b Samsung Semiconductor, Inc., k4b2g0846b Datasheet - Page 36
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k4b2g0846b
Manufacturer Part Number
k4b2g0846b
Description
2gb B-die Ddr3 Sdram Specification
Manufacturer
Samsung Semiconductor, Inc.
Datasheet
1.K4B2G0846B.pdf
(61 pages)
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K4B2G04(08/16)46B
[Table 37] IDD4W Measurement - Loop Pattern
Note :
1. DM must be driven LOW all the time. DQS, DQS are used according to WR Commands, otherwise MID-LEVEL.
2. Burst Sequence driven on each DQ signal by Write Command. Outside burst operation, DQ signals are MID-LEVEL.
[Table 38] IDD5B Measurement - Loop Pattern
Note :
1. DM must be driven LOW all the time. DQS, DQS are MID-LEVEL.
2. DQ signals are MID-LEVEL.
0
1
2
3
4
5
6
7
0
1
2
33...nRFC - 1
13...16
17...20
21...24
25...28
29...32
16-23
24-31
32-39
40-47
48-55
56-63
9...12
8-15
5...8
2,3
6,7
1,2
3,4
0
1
4
5
0
repeat Sub-Loop 0, but BA[2:0] = 1
repeat Sub-Loop 0, but BA[2:0] = 2
repeat Sub-Loop 0, but BA[2:0] = 3
repeat Sub-Loop 0, but BA[2:0] = 4
repeat Sub-Loop 0, but BA[2:0] = 5
repeat Sub-Loop 0, but BA[2:0] = 6
repeat Sub-Loop 0, but BA[2:0] = 7
repeat cycles 1...4, but BA[2:0] = 1
repeat cycles 1...4, but BA[2:0] = 2
repeat cycles 1...4, but BA[2:0] = 3
repeat cycles 1...4, but BA[2:0] = 4
repeat cycles 1...4, but BA[2:0] = 5
repeat cycles 1...4, but BA[2:0] = 6
repeat cycles 1...4, but BA[2:0] = 7
repeat Sub-Loop 1, until nRFC - 1. Truncate, if necessary.
REF
D,D
D,D
D,D
WR
WR
D
D
D
0
1
1
0
1
1
0
1
1
1
1
1
0
1
1
0
1
0
0
1
Page 36 of 61
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2Gb DDR3 SDRAM
Rev. 1.0 December 2008
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F
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00000000
00110011
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