m28f008 Intel Corporation, m28f008 Datasheet - Page 23

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m28f008

Manufacturer Part Number
m28f008
Description
8 Mbit 1 Mbit X 8 Flash Memory
Manufacturer
Intel Corporation
Datasheet
ALTERNATIVE CE-CONTROLLED WRITES
NOTES
1 Chip-Enable Controlled Writes Write operations are driven by the valid combination of CE and WE In systems where CE
defines the write pulsewidth (within a longer WE timing waveform) all setup hold and inactive WE times should be mea-
sured relative to the CE waveform
2 Sampled not 100% tested
3 Refer to Table 3 for valid A
4 Refer to Table 3 for valid D
5 Byte write and block erase durations are measured to completion (SR 7
V
6 See AC Input Output Reference Waveforms and AC Testing Load Circuits for testing characteristics
PPH
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
AVAV
PHEL
WLEL
ELEH
VPEH
AVEH
DVEH
EHDX
EHAX
EHWH
EHEL
EHRL
EHQV1
EHQV2
EHGL
QVVL
Symbol
until determination of byte write block erase success (SR 3 4 5
t
t
t
t
t
t
t
t
t
t
t
t
WC
PS
WS
CP
VPS
AS
DS
DH
AH
WH
EPH
VPH
Write Cycle Time
RP High Recovery to CE
Going Low
WE Setup to CE Going Low
CE Pulse Width
V
Address Setup to CE Going
High
Data Setup to CE Going High
Data Hold from CE High
Address Hold from CE High
WE Hold from CE High
CE Pulse Width High
CE High to RY BY Going
Low
Duration of Byte Write
Operation
Duration of Block Erase
Operation
Write Recovery before Read
V
RY BY High
PP
PP
Setup to CE Going High
Hold from Valid SRD
IN
IN
for byte write or block erasure
for byte write or block erasure
Parameter
Notes
2 5
2
2
3
4
5
5
(1)
e
M28F008-10
Min
100
100
0 3
50
40
40
25
0)
1
0
5
5
0
6
0
0
e
1 RY BY
Max
100
(6)
e
V
M28F008-12
Min
120
100
OH
0 3
50
40
40
25
1
0
5
5
0
6
0
0
) V
PP
should be held at
Max
100
(6)
M28F008
Unit
sec
ns
ms
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ms
ms
ns
23

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