m3488q1 STMicroelectronics, m3488q1 Datasheet
m3488q1
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m3488q1 Summary of contents
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... November 1994 This is advanced information on a new product now in development or undergoing evaluation. Details are subject to change without notice. M3488 PREL IMINARY DATA DIP40 PQFP44 ORDERING NUMBERS: M3488B1 M3488Q1 Main instructions controlled by the microproc- . essor interface . CHANNEL CONNECTION/DISCONNECTION . OUTPUT CHANNEL DISCONNECTION INSERTION OF A BYTE ON A PCM OUTPUT ...
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M3488 PIN CONNECTIONS (Top views) DIP40 EXCHANGE NETWORKS APPLICATIONS 256 PCM links network (160 or 192 DSM) : the link module shown on the next page. 2048 PCM links network (1792 or 2048 DSM) : the 256 ...
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EXCHANGE NETWORKS APPLICATIONS (continued) Single Stage/Sixteen Devices Configuration ( links or 1024 channels). M3488 3/18 ...
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M3488 BLOCK DIAGRAM 4/18 ...
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RECOMMENDED OPERATING CONDITIONS Symbol Parameter V Supply Voltage CC V Input Voltage i V Off State Input Voltage O CLOCK Input Clock Frequency Freq. SYNC Freq. Input Synchronization Frequency T Operating Temperature op CAPACITANCES (measurement freq. = 1MHz; T Symbol ...
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M3488 A.C. ELECTRICAL CHARACTERISTICS (T All A.C. characteristics are valid 250 s after V Signal Symbol Parameter CK (clock) t Clock Period CK t Clock Low Level Width WL t Clock High Level Width WH t Rise Time R t ...
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A.C. ELECTRICAL CHARACTERISTICS (continued) Signal Symbol Parameter CS1, CS2 t Low level setup time SL(CS-WR falling edge t Low Level hold time HL(CS-WR) from WR rising edge t High Level setup time SH(CS-WR falling edge t ...
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M3488 PCM TIMING, RESET, SYNC WRITE OPERATION TIMING 8/18 ...
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READ OPERATION TIMING GENERAL DESCRIPTION The M3488is intendedfor large telephoneswitching systems, mainly central exchanges, digital line con- centrators and private branch exchanges where a distributed microcomputer control approach is ex- tensively used. It consists of a speech memory (SM), a ...
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M3488 PINS FUNCTION Symbol Data bus C/D Input control A1, S1, A2, S2 Address select or match CS1, CS2 Chip select WR Data transfer enable RD Read enable DR Data ready RESET RESET control CLOCK Input master ...
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PIN DESCRIPTION Data bus pins. The bidirectional bus is usedto trans- fer dataand instructions to/fromthe microprocessor the least significant digit. The output bus is 8 bits wide ; input is only 5 bits wide. (D4 ...
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M3488 Internal time bases are forced by synchronism to an assigned count number in order to restore channels and bit sequential addressing to a known state. Count difference between the bases is 32, corre- spondingto two time slots, that is ...
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During a very long internal operation (device initiali- zation after RESET going high or execution of in- struction 6) a new set of data bytes with a valid op- code is accepted while a wrong code is rejected. At the ...
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M3488 INSTRUCTION2: OUTPUT CHANNEL DISCONNECTION Control Signals Match C Yes Yes ...
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INSTRUCTION5: TRANSFER OF AN OUTPUT CHANNEL CONTROL WORD Control Signals Match C Yes Yes ...
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M3488 PQFP44 (10 x 10) PACKAGE MECHANICAL DATA mm DIM. MIN. TYP 0.25 A2 1.95 2.00 B 0.30 c 0.13 D 12.95 13.20 D1 9.90 10.00 D3 8.00 e 0.80 E 12.95 13.20 E1 9.90 10.00 E3 8.00 ...
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DIP40 PACKAGE MECHANICAL DATA mm DIM. MIN TYP a1 0.63 b 0.45 b1 0. 15.2 e 2.54 e3 48. 4.445 L 3.3 inch MAX MIN TYP 0.025 0.018 0.31 0.009 0.050 52.58 16.68 0.598 ...
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M3488 Information furnished is believed to be accurate and reliable. However, SGS-THOMSON Microelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from ...