m35b32 STMicroelectronics, m35b32 Datasheet - Page 8

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m35b32

Manufacturer Part Number
m35b32
Description
32 Kbit, 256-byte Page, Fast Program Eeprom Memory Accessed By Spi Bus Interface
Manufacturer
STMicroelectronics
Datasheet
Signal description
2
2.1
2.2
2.3
2.4
2.5
8/42
Signal description
During all operations, V
V
All of the input and output signals must be held high or low (according to voltages of V
V
Serial Data output (Q)
This output signal is used to transfer data serially out of the device. Data is shifted out on the
falling edge of Serial Clock (C).
Serial Data input (D)
This input signal is used to transfer data serially into the device. It receives instructions,
addresses, and the data to be programmed. Values are latched on the rising edge of Serial
Clock (C).
Serial Clock (C)
This input signal provides the timing of the serial interface. Instructions, addresses, or data
present at Serial Data Input (D) are latched on the rising edge of Serial Clock (C). Data on
Serial Data Output (Q) changes after the falling edge of Serial Clock (C).
Chip Select (S)
When this input signal is high, the device is deselected and Serial Data Output (Q) is at high
impedance. Unless an internal Read, Program, Erase or Write cycle is in progress, the
device will be in the Standby Power mode (this is not the Deep Power-down mode). Driving
Chip Select (S) low selects the device, placing it in the Active Power mode.
After Power-up, a falling edge on Chip Select (S) is required prior to the start of any
instruction.
Reset (RESET)
The Reset (RESET) input provides a hardware reset for the memory. In this mode, the
device is in Standby mode, the WEL and WIP bits are reset (to 0) and the outputs are high
impedance.
When Reset (RESET) is driven high, the memory is in the normal operating mode. When
Reset (RESET) is driven low, the memory will enter the Reset mode
c. If the M35A32 is executing a Write (pr program) cycle), the RESET pin driven active (low) does not stop an on
OH
CC
going Program or Write cycle.
(min) to V
, V
IL
or V
OL
CC
, as specified in
(max).
CC
must be held stable and within the specified valid range:
Doc ID 18391 Rev 3
Table
10). These signals are described below.
(c)
.
M35B32
IH
,

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