ISL12022 INTERSIL [Intersil Corporation], ISL12022 Datasheet

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... Low Power RTC with Battery-Backed SRAM and Embedded Temp Compensation with Auto Daylight Saving The ISL12022 device is a low power real time clock with an embedded Temp sensor for oscillator compensation, clock/calendar, power fail, low battery monitor, brownout indicator, single periodic or polled alarms, intelligent battery-backup switching, Battery Reseal™ ...

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... Serial Clock. The SCL input is used to clock all serial data into and out of the device. 7 IRQ/F Interrupt Output/Frequency Output. Multi-functional pin that can be used as interrupt or frequency output pin. The OUT function is set via the configuration register open-drain output Power Supply ISL12022 V RANGE TEMP RANGE DD (V) 2.7 to 5.5 - ...

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... LSB Temp Temperature Sensor Accuracy IRQ/F (OPEN DRAIN OUTPUT) OUT V Output Low Voltage OL 3 ISL12022 Thermal Information Thermal Resistance (Typical, Note SOIC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . .-65°C to +150°C + 0.3V Pb-free Reflow Profile . . . . . . . . . . . . . . . . . . . . . . . . .see link below DD http://www.intersil.com/pbfree/Pb-FreeReflow.asp = +2.7 to +5.5V -40°C to +85°C, unless otherwise stated. ...

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... START Condition Hold Time HD:STA t Input Data Setup Time SU:DAT t Input Data Hold Time HD:DAT t STOP Condition Setup Time SU:STO 4 ISL12022 = +2.7 to +5.5V -40°C to +85°C, unless otherwise stated MIN CONDITIONS (Note 9) = +2.7 to +5.5V -40°C to +85°C, unless otherwise specified MIN ...

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... Specifications are typical and require using a recommended crystal (see “Application Section” on page 25). 11. Minimum V and/ sustain the SRAM. The value is based on characterization and it is not tested. DD BAT 5 ISL12022 = +2.7 to +5.5V -40°C to +85°C, unless otherwise specified. (Continued TEST CONDITIONS (Note 9) From SDA rising edge to SCL falling edge ...

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... Changes Allowed N/A EQUIVALENT AC OUTPUT LOAD CIRCUIT FOR V 5.0V 1533Ω SDA AND IRQ/F OUT 100pF FIGURE 1. STANDARD OUTPUT LOAD FOR TESTING THE DEVICE WITH ISL12022 t t HIGH LOW t SU:DAT t HD:DAT OUTPUTS Will be steady Will change from LOW to HIGH Will change from HIGH ...

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... -40 - TEMPERATURE (°C) FIGURE TEMPERATURE DD1 5. 3. 0.01 0 100 FREQUENCY OUTPUT (Hz) FIGURE OUT 7 ISL12022 Temperature is +25°C unless otherwise specified. 1600 1400 1200 1000 4.3 4.8 5.3 BAT 4.4 4.2 4.0 3.8 3 2.7V BAT 3.4 3.2 3 5.5 5.0 4.5 4.0 3.5 = 2.7V 3.0 2.5 -40 1k 10k 100k FIGURE 7. I ...

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... FIGURE 8. I WITH TSE = 1 vs TEMPERATURE DD General Description The ISL12022 device is a low power real time clock (RTCs) with embedded temperature sensors. It contains crystal frequency compensation circuitry over the operating temperature range, clock/calendar, power fail and low battery monitors, brownout indicator, 1 periodic or polled alarm, intelligent battery-backup switching and 128 Bytes of battery-backed user SRAM ...

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... Many types of batteries can be used with Intersil RTC products. For example, 3.0V or 3.6V Lithium batteries are appropriate, and battery sizes are available that can power the ISL12022 for years. Another option is to use a super capacitor for applications where month. See the “Application Section” on page 25 for more information ...

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... FOBATB bit. For more information on the alarm, please see “ALARM Registers (10h to 15h)” on page 19. Frequency Output Mode The ISL12022 has the option to provide a clock output signal using the IRQ/F output mode is set by using the FO bits to select 15 possible output frequency values from 1/32Hz to 32kHz. The frequency output can be enabled/disabled during battery-backup mode using the FOBATB bit ...

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... FATR 0 0Fh FDTR 0 11 ISL12022 6. Daylight Savings Time (8 bytes): 20h to 27h. 7. TEMP (2 bytes): 28h to 29h 8. Crystal Net PPM Correction, NPPM (2 bytes): 2Ah, 2Bh 9. Crystal Turnover Temperature, XT0 (1 byte): 2Ch 10. Crystal ALPHA at high temperature, ALPHA_H (1 byte): 2Dh 11. Scratch Pad (2 bytes): Address 2Eh and 2Fh ...

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... NPPML NPPM7 NPPM 2Bh NPPMH 0 2Ch XT0 D XT0 2Dh ALPHAH D ALPHAH 2Eh GPM1 GPM17 GPM 2Fh GPM2 GPM27 12 ISL12022 TABLE 1. REGISTER MEMORY MAP (Continued) BIT SCA022 SCA021 SCA020 SCA013 MNA022 MNA021 MNA020 MNA013 D HRA021 HRA020 HRA013 D DTA021 DTA020 DTA013 ...

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... This means that the year 2000 is a leap year and the year 2100 is not. The ISL12022 does not correct for the leap year in the year 2100. Control and Status Registers (CSR) Addresses [07h to 0Fh] ...

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... Normal Mode. REAL TIME CLOCK FAIL BIT (RTCF) This bit is set to a “1” after a total power failure. This is a read only bit that is set by hardware (ISL12022 internally) when the device powers up after having lost all power (defined and V = 0V) ...

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... ISL12022 PIN Battery Voltage Trip Voltage Register (PWR_VBAT) OUT This register controls the trip points for the two V with levels set to approximately 85% and 75% of the nominal FO1 FO0 battery level ADDR ...

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... TABLE 11. INITIAL AT AND DT SETTING REGISTER ADDR 0Bh IDTR01 IDTR00 IATR05 IATR04 IATR03 IATR02 IATR01 IATR00 16 ISL12022 Aging adjustment is normally a few ppm and can be handled by writing to the IATR section. BATTERY ALARM TRIP LEVEL IATR05 IATR04 IATR03 IATR02 IATR01 IATR00 (V) 0 1.875 0 2 ...

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... Alpha Cold (There is an Alpha Hot register that must be programmed as well normally given in units of 2 ppm/°C , with a typical value of -0.034. The ISL12022 device uses a scaled version of the absolute value of this coefficient in order to get an integer value. Therefore, Alpha<7:0> is defined as the (|Actual Alpha Value| x 2048) and converted to binary ...

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... ISL12022 (EQ. 2) Final Analog Trimming Register (FATR) )/63 (EQ. 3) This register shows the final setting of AT after temperature correction read-only; the user cannot overwrite a value to this register. This value is accessible as a means of monitoring the temperature compensation function. See Table 17. ...

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... Alarm registers (ESCA0... EDWA0) to “1”, the IM bit to “1”, and disabling the frequency output. The IRQ/F 19 ISL12022 output will now be pulsed each time an alarm occurs. This means that once the interrupt mode alarm is set, it will continue to alarm for each occurring match of the alarm ppm and present time ...

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... Date Reverse 0 27h Hour Reverse 0 20 ISL12022 DST Control Registers (DSTCR) 8 bytes of control registers have been assigned for the Daylight Savings Time (DST) functions. DST beginning (set Forward) time is controlled by the registers DstMoFd, DstDwFd, DstDtFd, and DstHrFd. DST ending time (set Backward or Reverse) is controlled by DstMoRv, DstDwRv, DstDtRv and DstHrRv ...

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... Day of the Week that DST ends. Note that Day of the week counts from like the RTC registers. The 21 ISL12022 default for the DST Reverse Day of the Week is 00h (normally Sunday). • Bits contain the Week of the Month information that sets the week that DST ends ...

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... XT4 XT3 The ISL12022 allows setting the turnover temperature so that temperature compensation can more exactly fit the curve of a crystal. Table 24 shows the values available, with a range from +17.5°C to +32.5°C in +0.5°C increments. The default value is 00000b or +25°C. TABLE 24. XT0 VALUES XT< ...

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... Protocol Conventions Data states on the SDA line can change only during SCL LOW periods. SDA state changes during SCL HIGH are reserved for indicating START and STOP conditions (see Figure 14). On power-up of the ISL12022, the SDA pin is in the input mode. 2 All I ...

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... Identification byte with the R/W bit set to “0”, an Address Byte, a second START, and a second Identification byte with the R/W bit set to “1”. After each of the three bytes, the ISL12022 responds with an ACK. Then the ISL12022 transmits Data Bytes as long as the master responds with an ACK during the SCL cycle following the eighth bit of each byte ...

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... This list is not exhaustive and other surface mount devices can be used with the ISL12022 if their specifications are very similar to the devices listed. The crystal should have a required parallel load capacitance of 12.5pF and an equivalent series resistance of less than 50k. The crystal’ ...

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... DT settings, except for the 32,768Hz setting which only shows the AT control. ACTIVE TEMPERATURE COMPENSATION The ISL12022 contains an intelligent logic circuit which takes the temperature sensor digital value as the only input variable. It then uses the register values for the crystal variables α ...

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... ISL12022 temperature for aging or board mounting. The original recalled value can be re-written if desired after testing. For further information on the operation of the ISL12022 and temperature compensated RTC’s, see Intersil Application OUT Note AN1389, “Using Intersil’s High Accuracy Real Time Clock Module”. ...

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... However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see www.intersil.com 28 ISL12022 M8.15 (JEDEC MS-012-AA ISSUE C) 8 LEAD NARROW BODY SMALL OUTLINE PLASTIC PACKAGE ...