RHRXH162373K-01Q STMICROELECTRONICS [STMicroelectronics], RHRXH162373K-01Q Datasheet

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RHRXH162373K-01Q

Manufacturer Part Number
RHRXH162373K-01Q
Description
Rad hard low voltage CMOS 16-bit D-type latch (3-state) with 3.6V tolerant inputs and outputs
Manufacturer
STMICROELECTRONICS [STMicroelectronics]
Datasheet
Features
July 2007
1.65 to 3.6V inputs and outputs
High speed:
– t
– t
Symmetrical impedance outputs:
– |I
– |I
Power down protection on inputs and outputs
26Ω serie resistors in outputs
Operating voltage range:
– V
Pin and function compatible with 54 SERIES
HR162373
Bus hold provided on both sides
Cold spare function
Latch-up performance exceeds
300mA (JESD 17)
ESD performance:
– HBM > 2000V
300KRad Mil1019.6 Condition A, (RHA QML
qualification extension undergone)
No SEL, no SEU under 72 Mev/cm2/mg LET
heavy ions irradiation
QML qualified product
Device fully compliant with
DSCC SMD 5962-05211
(MIL STD 883 method 3015); MM > 200V
PD
PD
OH
OH
CC
= 3.3ns (Max) at V
= 4.5ns (Max) at V
| = I
| = I
(Opr) = 1.65V to 3.6V
OL
OL
Rad hard low voltage CMOS 16-bit D-type latch (3-state)
= 12mA (Min) at V
= 8mA (Min) at V
CC
CC
= 3.0 to 3.6V
= 2.3 to 2.7V
CC
CC
= 2.3V
= 3.0V
with 3.6V tolerant inputs and outputs
Rev 4
Description
The 54VCXH162373 is a low voltage CMOS 16
bit d-type latch with 3 state outputs non inverting
fabricated with sub-micron silicon gate and five-
layer metal wiring C
for low power and very high speed 1.65 to 3.6V
applications; it can be interfaced to 3.6V signal
environment for both inputs and outputs.
These 16 bit D-TYPE latches are bite controlled
by two latch enable inputs (nLE) and two output
enable inputs (OE).
While the nLE input is held at a high level, the nQ
outputs will follow the data input precisely.
When the nLE is taken low, the nQ outputs will be
in a normal logic state (high or low logic level) and
while high level the outputs will be in a high
impedance state. Bus hold on data inputs is
provided in order to eliminate the need for
external pull-up or pull-down resistor. The device
circuits is including 26Ω series resistance in the
outputs. These resistors permit to reduce line
noise in high speed applications.
All inputs and outputs are equipped with
protection circuits against static discharge, giving
them 2KV ESD immunity and transient excess
voltage.
54VCXH162373
2
MOS technology. It is ideal
Flat-48
www.st.com
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RHRXH162373K-01Q Summary of contents

Page 1

Rad hard low voltage CMOS 16-bit D-type latch (3-state) Features ■ 1.65 to 3.6V inputs and outputs ■ High speed: – 3.3ns (Max – 4.5ns (Max ■ Symmetrical ...

Page 2

Contents Contents 1 Logic symbols and I/O equivalent circuit . . . . . . . . . . . . . . . . . . . . . . . . 3 2 Pin settings . . . ...

Page 3

Logic symbols and I/O equivalent circuit Figure 1. IEC logic symbols Figure 2. Input and output equivalent circuit Logic symbols and I/O equivalent circuit 3/17 ...

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Logic symbols and I/O equivalent circuit Figure 3. Logic diagram Note: This logic diagram has not to be used to estimate propagation delays 4/17 54VCXH162373 ...

Page 5

Pin settings 2.1 Pin connection Figure 4. Pin connection (top through view) Pin settings 5/17 ...

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Pin settings 2.2 Pin description Table 1. Pin description Pin N° 11, 12 13, 14, 16, 17, 19, 20, 22 36, 35, 33, 32, 30, 29, 27, 26 47, 46, ...

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Maximum rating Stressing the device above the rating listed in the “Absolute Maximum Ratings” table may cause permanent damage to the device. These are stress ratings only and operation of the device at these or any other conditions ...

Page 8

Electrical characteristics 4 Electrical characteristics Table 5. DC specifications (2.7V < V Symbol Parameter V High level input voltage IH V Low level input voltage IL High level output V OH voltage Low level output V OL voltage I Input ...

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Table 6. DC specifications (2.3V < V Symbol Parameter V High level input voltage IH V Low level input voltage IL V High level output voltage OH V Low level output voltage OL I Input leakage current I I ...

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Electrical characteristics Table 8. AC electrical characteristics (C Symbol Propagation delay t t PLH PHL time Propagation delay t t PLH PHL time Output enable time PZL PZH t t Output disable ...

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Test circuit Figure 5. Test circuit Table 10. Test circuit PLH PHL 3.0 to 3.6V) PZL PLZ 2.3 to 2.7V) PZL PLZ CC t ...

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Waveforms 6 Waveforms Table 11. Waveform symbol value Symbol Figure 6. Waveform - LE TO Qnpropagation delays, LE minimum pulse width setup and hold times (f = 1MHz; 50% ...

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Figure 7. Waveform - output enable and disable time (f = 1MHz; 50% duty cycle) Figure 8. Waveform - propagation delay time (f = 1MHz; 50% duty cycle) Waveforms 13/17 ...

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Package mechanical data 7 Package mechanical data 54VCXH162373 Products are supplied into ceramic body / metal lid hermetic Flat 48-pin space package Table 12. Flat-48 (MIL-STD-1835) mechanical data Dim ...

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... Order code Table 13. Order code Package Lead finish Radiation level Gold 300kRad Flat-48 Gold 100kRad Solder dip 100kRad Flight model QML-V QML-Q RHFXH162373K-01V RHFXH162373K-01Q RHRXH162373K-01V RHRXH162373K-01Q RHRXH162373K-02V RHRXH162373K-02Q Order code Engineering model RHRXH162373K1 RHRXH162373K1 Use the above one 15/17 ...

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Revision history 9 Revision history Table 14. Revision history Date 09-Jul-2004 17-May-2005 19-Jun-2006 30-Jul-2007 16/17 Revision 1 First release 2 SMD qualified 3 300Krad bullet updated, new template, mechanical data updated 4 Typo in Table 12 on page 54VCXH162373 Changes ...

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Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at ...

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