lc75808e Sanyo Semiconductor Corporation, lc75808e Datasheet
lc75808e
Related parts for lc75808e
lc75808e Summary of contents
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... Ordering number : ENN6370A Overview The LC75808E and LC75808W are 1/8 to 1/10 duty LCD display drivers that can directly drive up to 600 segments and can control up to four general-purpose output ports. These products also incorporate a key scan circuit that accepts input from keys to reduce printed circuit board wiring ...
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... Pin Assignment LC75808E, 75808W No. 6370 -2/39 ...
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... CE wait time CE setup time CE hold time High level clock pulse width Low level clock pulse width DO output delay time DO rise time Note: *1. Since open-drain output, these values depend on the resistance of the pull-up resistor R LC75808E, 75808W =0V SS Symbol Conditions V max V DD ...
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... Output off leakage current Output high level voltage Output low level voltage Output middle level voltage *2 Oscillator frequency Current drain Note: *2. Excluding the bias voltage generation divider resistor built into V LC75808E, 75808W Symbol Conditions V CE, CL, DI, INH, KI1 to KI5 H V DET ...
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... When CL is stopped at the low level 2. When CL is stopped at the high level LC75808E, 75808W To the common and segment drivers Excluding these resistors. Figure 1 Figure 2 No. 6370 -5/39 ...
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... Block Diagram LC75808E, 75808W No. 6370 -6/39 ...
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... V when the display contrast adjustment circuit is used and LCD provide a voltage of between 4.5 and 11.0 V when the circuit is not used Power supply connection. Connect to ground. SS LC75808E, 75808W Function ): SS • Display off S1 to S60 = “L” (V 4). LCD COM1 to COM10 = “L” (V 4). LCD • ...
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... Serial Data Input 1. 1/8 duty When CL is stopped at the low level. • When the display data is transferred. • When the control data is transferred. Note B3, ........ CCB address DD ................................ Direction data LC75808E, 75808W Display data Display data Display data Display data Control data Fixed data ...
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... PC1 to PC4: ........ General-purpose output port state setting data • CT0 to CT3, CTC: Display contrast setting data • SC: ...................... Segment on/off control data • SP: ...................... Normal mode/sleep mode control data • DT1, DT2: ............ Display technique setting data LC75808E, 75808W Display data Display data Display data Display data ...
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... When CL is stopped at the low level. • When the display data is transferred. • When the control data is transferred. Note B3, ........ CCB address DD ................................ Direction data LC75808E, 75808W Display data Display data Display data Display data Control data Fixed data Fixed data ...
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... PC1 to PC4: ........ General-purpose output port state setting data • CT0 to CT3, CTC: Display contrast setting data • SC: ...................... Segment on/off control data • SP: ...................... Normal mode/sleep mode control data • DT1, DT2: ............ Display technique setting data LC75808E, 75808W Display data Display data Display data Display data ...
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... When CL is stopped at the low level. • When the display data is transferred. • When the control data is transferred. Note B3, ........ CCB address DD ................................ Direction data LC75808E, 75808W Display data Display data Display data Display data Control data Fixed data Fixed data ...
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... PC1 to PC4: ........ General-purpose output port state setting data • CT0 to CT3, CTC: Display contrast setting data • SC: ...................... Segment on/off control data • SP: ...................... Normal mode/sleep mode control data • DT1, DT2: ............ Display technique setting data LC75808E, 75808W Display data Display data Display data Display data ...
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... Note that although the display contrast can be adjusted by operating the built-in display contrast adjustment circuit also possible to apply fine adjustments to the contrast by connecting an external variable resistor to the V modifying the V 4 pin voltage. However, the following conditions must be met: (V LCD ≥ ≥ LCD LC75808E, 75808W KS2 KS3 KS4 KS5 KS6 KC2 KC3 ...
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... Note: COMn ( 10): Common outputs LC75808E, 75808W Mode 4 level and the oscillator on the OSC pin is stopped (although it operates during key LCD Output pins COM9 COM10 Fixed at the VLCD4 level ...
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... D273 S36 D281 S37 D289 S38 D297 S39 D305 S40 D313 S41 D321 S42 D329 S43 D337 S44 D345 S45 D353 LC75808E, 75808W COM2 COM3 COM4 D10 D11 D12 D18 D19 D20 D26 D27 D28 D34 D35 D36 D42 D43 ...
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... LC75808E, 75808W COM2 COM3 COM4 D362 D363 D364 D370 D371 D372 D378 D379 D380 D386 D387 D388 D394 D395 D396 D402 D403 D404 D410 D411 D412 D418 D419 ...
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... S39 D343 D344 S40 D352 D353 S41 D361 D362 S42 D370 D371 S43 D379 D380 S44 D388 D389 S45 D397 D398 LC75808E, 75808W COM3 COM4 COM5 COM6 D12 D13 D14 D15 D21 D22 D23 D24 D30 D31 D32 D33 ...
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... LC75808E, 75808W COM3 COM4 COM5 D408 D409 D410 D417 D418 D419 D426 D427 D428 D435 D436 D437 D444 D445 D446 D453 D454 D455 D462 D463 D464 D471 D472 ...
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... S39 D381 D382 S40 D391 D392 S41 D401 D402 S42 D411 D412 S43 D421 D422 S44 D431 D432 S45 D441 D442 LC75808E, 75808W COM3 COM4 COM5 COM6 D13 D14 D15 D16 D23 D24 D25 D26 D33 D34 D35 D36 ...
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... LC75808E, 75808W COM3 COM4 COM5 COM6 D453 D454 D455 D456 D463 D464 D465 D466 D473 D474 D475 D476 D483 D484 D485 D486 D493 D494 D495 D496 D503 D504 ...
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... This output data bit is set to the state when the key was pressed. Also, while DO will be low in this case, if serial data is input and the mode is set (to normal or sleep mode) during this period, that mode will be set. SA will sleep mode and 0 in normal mode. LC75808E, 75808W KI3 KI4 ...
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... CE is high during a serial data transfer, DO will be set high. • After the controller reads the key data, the key data read request is cleared (DO is set high) and the LC75808E/W performs another key scan. Also note that DO, being an open-drain output, requires a pull-up resistor (between 1 kΩ ...
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... CE is high during a serial data transfer, DO will be set high. • After the controller reads the key data, the key data read request is cleared (DO is set high) and the LC75808E/W performs another key scan. However, this dose not clear sleep mode. Also note that DO, being an open-drain output, requires a pull-up resistor (between 1 kΩ ...
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... COM1 to COM8 are turned off LCD driver output when only LCD segments corresponding to COM1 are turned on LCD driver output when only LCD segments corresponding to COM2 are turned on LCD driver output when all LCD segments corresponding to COM1 to COM8 are turned on LC75808E, 75808W No. 6370 -25/39 ...
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... COM1 to COM9 are turned off LCD driver output when only LCD segments corresponding to COM1 are turned on LCD driver output when only LCD segments corresponding to COM2 are turned on LCD driver output when all LCD segments corresponding to COM1 to COM9 are turned on LC75808E, 75808W No. 6370 -26/39 ...
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... COM1 to COM10 are turned off LCD driver output when only LCD segments corresponding to COM1 are turned on LCD driver output when only LCD segments corresponding to COM2 are turned on LCD driver output when all LCD segments corresponding to COM1 to COM10 are turned on LC75808E, 75808W No. 6370 -27/39 ...
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... System Reset 1. Reset Function The LC75808E/W performs a system reset with the VDET. When a system reset is applied, the display is turned off, key scanning is disabled, the key data is reset, and the general-purpose output ports are set to and held at the low level (V These states that are created as a result of the system reset can be cleared by executing the instruction described below. ...
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... PC4, CT0 to CT3, CTC, SC, SP, DT1, DT2) Internal data (D1 to D150) Internal data (D151 to D300) Internal data (D301 to D450) Internal data (D451 to D600) Key scan General-purpose output ports Display state LC75808E, 75808W Undefined Undefined Undefined Undefined Undefined Disabled Fixed at the low level (V ) ...
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... LC75808E/W internal block states during the system reset • CLOCK GENERATOR Reset is applied and the base clock is stopped. However, the OSC pin state (normal or sleep mode) is determined after the SP control data bit is transferred. • COMMON DRIVER, SEGMENT DRIVER & LATCH Reset is applied and the display is turned off. However, display data can be input to the latch circuit in this state. ...
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... LC75808E, 75808W *7 *8 Key matrix ( keys) fall time when power drops are both at least 1 ms, as the LC75808E/W is reset by the VDET. 4 pin must be connected to ground. LCD LCD panel general-purpose output ports Used with the backlight controller or other circuit ...
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... LC75808E, 75808W *7 *8 Key matrix ( keys) fall time when power drops are both at least 1 ms, as the LC75808E/W is reset by the VDET pin must be connected to ground. LCD LCD panel general-purpose output ports Used with the backlight controller or other circuit ...
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... LC75808E, 75808W *7 *8 Key matrix ( keys) fall time when power drops are both at least 1 ms, as the LC75808E/W is reset by the VDET. 4 pin must be connected to ground. LCD LCD panel general-purpose output ports Used with the backlight controller or other circuit ...
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... LC75808E, 75808W *7 *8 Key matrix ( keys) fall time when power drops are both at least 1 ms, as the LC75808E/W is reset by the VDET pin must be connected to ground. LCD LCD panel general-purpose output ports Used with the backlight controller or other circuit ...
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... LC75808E, 75808W *7 *8 Key matrix ( keys) fall time when power drops are both at least 1 ms, as the LC75808E/W is reset by the VDET. 4 pin must be connected to ground. LCD LCD panel general-purpose output ports Used with the backlight controller or other circuit ...
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... The DO pin, being an open-drain output, requires a pull-up resistor. Select a resistance (between 1 kΩ kΩ) appropriate for the capacitance of the external wiring so that signal waveforms are not degraded. Notes on Transferring Display Data from the Controller The display data is transferred to the LC75808E/W in four operations. All of the display data should be transferred within maintain the quality of the displayed image. LC75808E, 75808W ...
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... The period t9 in this technique must satisfy the following condition. t9 > key data read operation is executed when DO is high, the read key data (KD1 to KD30) and sleep acknowledge data (SA) will be invalid. LC75808E, 75808W ——— fosc No. 6370 -37/39 ...
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... Key scan execution time when the key data agreed for two key scans. (800T(S)) t6: Key scan execution time when the key data did not agree for two key scans and the key scan was executed again. (1600T(S)) t7: Key address (43H) transfer time t8: Key data read time LC75808E, 75808W ——— fosc No. 6370 -38/39 ...
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... SANYO believes information herein is accurate and reliable, but no guarantees are made or implied regarding its use or any infringements of intellectual property rights or other rights of third parties. This catalog provides information as of March, 2000. Specifications and information herein are subject to change without notice. LC75808E, 75808W PS No. 6370 -39/39 ...