lc75808e Sanyo Semiconductor Corporation, lc75808e Datasheet - Page 30
lc75808e
Manufacturer Part Number
lc75808e
Description
1/8 To 1/10 Duty Lcd Display Drivers With Key Input Function
Manufacturer
Sanyo Semiconductor Corporation
Datasheet
1.LC75808E.pdf
(39 pages)
- Current page: 30 of 39
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2. LC75808E/W internal block states during the system reset
• CLOCK GENERATOR
• COMMON DRIVER, SEGMENT DRIVER & LATCH
• CONTRAST ADJUSTER
• KEY SCAN, KEY BUFFER
• GENERAL PORT
• CCB INTERFACE, SHIFT REGISTER, CONTROL REGISTER
Reset is applied and the base clock is stopped. However, the OSC pin state (normal or sleep mode) is determined
after the SP control data bit is transferred.
Reset is applied and the display is turned off. However, display data can be input to the latch circuit in this state.
Reset is applied and operation of the display contrast adjustment circuit is disabled. After that, once CT0 to CT3
and CTC in the control data have been transferred to the IC it will then be possible to set the display contrast.
Reset is applied, these circuits are forcibly initialized internally, and key scan operation is disabled. Also, the key
data is all set to 0. After that, once KC1 to KC6 in the control data have been transferred to the IC it will then be
possible to perform key scan operations.
Reset is applied and the states of the general-purpose output ports are held fixed at the low level (V
Since serial data transfer is possible, these circuits are not reset.
LC75808E, 75808W
Blocks that are reset
SS
No. 6370 -30/39
).
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