74AUP1G38GF,132 NXP Semiconductors, 74AUP1G38GF,132 Datasheet - Page 8

IC NAND GATE 2-IN 6-XSON

74AUP1G38GF,132

Manufacturer Part Number
74AUP1G38GF,132
Description
IC NAND GATE 2-IN 6-XSON
Manufacturer
NXP Semiconductors
Series
74AUPr
Datasheet

Specifications of 74AUP1G38GF,132

Number Of Circuits
1
Package / Case
6-XSON, SOT891
Logic Type
NAND Gate with Open Drain
Number Of Inputs
2
Current - Output High, Low
4mA, 4mA
Voltage - Supply
0.8 V ~ 3.6 V
Operating Temperature
-40°C ~ 125°C
Mounting Type
Surface Mount
Product
NAND
Logic Family
74AUP
Low Level Output Current
4 mA
Propagation Delay Time
19.5 ns
Supply Voltage (max)
3.6 V
Supply Voltage (min)
0.8 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
Operating Temperature Range
- 40 C to + 125 C
Output Current
20 mA
Output Voltage
4.6 V
Power Dissipation
250 mW
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
74AUP1G38GF-H
74AUP1G38GF-H
935281115132
NXP Semiconductors
Table 8.
Voltages are referenced to GND (ground = 0 V; for test circuit see
[1]
[2]
[3]
12. Waveforms
Table 9.
74AUP1G38
Product data sheet
Symbol Parameter
C
C
Supply voltage
V
0.8 V to 1.6 V
1.65 V to 2.7 V
3.0 V to 3.6 V
Fig 7.
CC
L
PD
= 5 pF, 10 pF, 15 pF and 30 pF
All typical values are measured at nominal V
t
C
P
f
V
N = number of inputs switching.
pd
i
D
CC
PD
= input frequency in MHz;
is the same as t
= C
is used to determine the dynamic power dissipation (P
= supply voltage in V;
power dissipation
capacitance
Measurement points are given in
Logic levels: V
The data input (A or B) to output (Y) propagation delays
PD
Dynamic characteristics
Measurement points
× V
CC
2
× f
PZL
i
× N where:
OL
and t
and V
PLZ
Conditions
f
V
A, B input
i
Y output
OH
.
I
= 1 MHz;
V
V
V
V
V
V
= GND to V
are typical output voltage drop that occur with the output load.
CC
CC
CC
CC
CC
CC
= 0.8 V
= 1.1 V to 1.3 V
= 1.4 V to 1.6 V
= 1.65 V to 1.95 V
= 2.3 V to 2.7 V
= 3.0 V to 3.6 V
Input
V
0.5 × V
0.5 × V
0.5 × V
…continued
M
GND
V
V
Table
CC
OL
V
All information provided in this document is subject to legal disclaimers.
I
CC
CC
CC
CC
CC
9.
.
V
Rev. 4 — 7 October 2010
M
t
PLZ
D
in μW).
V
[3]
X
Min
Figure 8
Output
V
0.5 × V
0.5 × V
0.5 × V
-
-
-
-
-
-
M
25 °C
Low-power 2-input NAND gate (open drain)
Typ
CC
CC
CC
0.9
0.6
0.7
0.8
1.1
1.4
[1]
t
PZL
Max
-
-
-
-
-
-
V
M
001aab719
Min
-
-
-
-
-
-
−40 °C to +125 °C
V
V
V
V
74AUP1G38
X
OL
OL
OL
(85 °C)
+ 0.1 V
+ 0.15 V
+ 0.3 V
Max
-
-
-
-
-
-
© NXP B.V. 2010. All rights reserved.
(125 °C)
Max
-
-
-
-
-
-
8 of 18
pF
Unit
pF
pF
pF
pF
pF

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