lxt362 Intel Corporation, lxt362 Datasheet - Page 21

• Manufacturer Part Number: lxt362
• Description: Integrated T1 Lh/sh Transceiver For Ds1/dsx-1 Or Pri Applications
• Manufacturer: Intel Corporation

2.7.1
2.7.1.1
Datasheet
Figure 5. TAOS with LLOOP
Loopback Modes
Local Loopback (LLOOP)
See
(TCLK and TPOS/TNEG or TDATA) loop back through the jitter attenuator (if enabled) and
appear at RCLK and RPOS/RNEG or RDATA. Note that during LLOOP, the JASEL input is
strictly an enable/disable control, i.e. it does not affect the placement of the JA. If the JA is enabled,
it is active in the loopback circuit. If the JA is bypassed, it is not active in the loopback circuit.
The transmitter circuits are unaffected by LLOOP and the LXT362 continues to transmit the
TPOS/TNEG or TDATA inputs (or a stream of 1’s if TAOS is asserted). When used in this mode,
the transceiver can function as a stand-alone jitter attenuator.
In Hardware mode, Local loopback (LLOOP) is selected by setting LLOOP High; in Host mode,
by setting bit CR2.ELLOOP = 1.
Figure 5
Integrated T1 LH/SH Transceiver for DS1/DSX-1 or PRI Applications — LXT362
and
Figure
6. LLOOP inhibits the receiver circuits. The transmit clock and data inputs
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