ST24 STMICROELECTRONICS [STMicroelectronics], ST24 Datasheet - Page 8

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ST24

Manufacturer Part Number
ST24
Description
SERIAL 1K 128 x 8 EEPROM
Manufacturer
STMICROELECTRONICS [STMicroelectronics]
Datasheet

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ST24/25C01, ST24C01R, ST24/25W01
Figure 6. I
Write Operations
The Multibyte Write mode (only available on the
ST24/25C01 and the ST24C01R versions) is se-
lected when the MODE pin is at V
Write mode when MODE pin is at V
pin may be driven dynamically with CMOS input
levels.
Following a START condition the master sends a
device select code with the RW bit reset to ’0’. The
memory acknowledges this and waits for a byte
address. The byte address of 7 bits (the Most
Significant Bit is ignored) provides access to any of
the 128 bytes of the memory. After receipt of the
byte address the device again responds with an
acknowledge.
8/16
SCL
SDA
SCL
SDA
SCL
SDA
2
C Bus Protocol
CONDITION
START
CONDITION
START
MSB
1
MSB
1
IH
2
IL
and the Page
. The MODE
2
INPUT
SDA
3
3
CHANGE
SDA
For the ST24/25W01 versions, any write command
with WC = 1 (during a period of time from the
START condition untill the end of the Byte Address)
will not modify data and will NOT be acknowledged
on data bytes, as in Figure 9.
Byte Write. In the Byte Write mode the master
sends one data byte, which is acknowledged by the
memory. The master then terminates the transfer
by generating a STOP condition. The Write mode
is independant of the state of the MODE pin which
could be left floating if only this mode was to be
used. However it is not a recommended operating
mode, as this pin has to be connected to either V
or V
IL
, to minimize the stand-by current.
7
7
8
8
ACK
9
ACK
CONDITION
9
STOP
CONDITION
STOP
AI00792
IH

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