bt865a Conexant Systems, Inc., bt865a Datasheet - Page 59

• Manufacturer Part Number: bt865a
• Description: Ycrcb To Ntsc/pal Digital Video Encoder
• Manufacturer: Conexant Systems, Inc.

Bt864A/Bt865A Data Sheet
3.4.2
3.5
3.5.1
3.5.2
100138C
02/17/03
Analog Signal Interconnect
Applications Information
ESD and Latchup Considerations
Clock and Subcarrier Stability
The Bt864A/Bt865A should be located as close as possible to the output connectors to
minimize noise pickup and reflections caused by impedance mismatch.
The analog outputs are susceptible to crosstalk from digital lines; digital traces must
not be routed under or adjacent to the analog output traces.
To maximize the high-frequency power supply rejection, the video output signals
should overlay the ground plane.
For maximum performance, the analog video output impedance, cable impedance,
and load impedance should be the same. The load resistor connection between the
video outputs and AGND should be as close as possible to the Bt864A/Bt865A to
minimize reflections. Unused DAC outputs should be connected to AGND unless the
power-down feature is being utilized.
Correct ESD-sensitive handling procedures are required to prevent device damage.
Device damage can produce symptoms of catastrophic failure or erratic device
behavior with leaky inputs.
All logic inputs should be held low until power to the device has settled to the
specified tolerance. DAC power decoupling networks with large time constants should
be avoided; they could delay VAA power to the device. Ferrite beads must be used
only for analog power VAA decoupling. Inductors cause a time constant delay that
induces latchup.
Latchup can be prevented by ensuring that all VAA and VDD pins are at the same
potential, all GND and AGND pins are at the same potential, and that the VAA and
VDD supply voltages are applied before the signal pin voltages. The correct power-up
sequence ensures that any signal pin voltage will never exceed the power supply
voltage.
The color subcarrier is derived directly from the CLK input, hence any jitter or
frequency deviation of CLK will be transferred directly to the color subcarrier. Jitter
within the valid CLK cycle interval will result in hue noise on the color subcarrier on
the order of 0.9–1.6 degrees per nanosecond. Random hue noise can result in
degradation in AM/PM noise ratio (typically around 40 dB for consumer media such
as Videodiscs and VCRs). Periodic or coherent hue noise can result in differential
phase error (which is limited to 10 degrees by FCC cable TV standards). Any
frequency deviation of the CLK from nominal will challenge the subcarrier tracking
capability of the destination receiver. This may range from a few parts-per-million
(ppm) for broadcast equipment to 50 ppm for industrial equipment to a few hundred
ppm for consumer equipment. Greater subcarrier tracking range generally results in
poorer subcarrier decoding dynamic range, so that receivers that tolerate jitter and
wide subcarrier frequency deviation will introduce more noise in the decoded image.
Crystal clock sources provide best stability and lowest jitter, with 50–100 ppm
Conexant
PC Board Considerations
3-5