at7601fg AME, Inc., at7601fg Datasheet - Page 15

• Manufacturer Part Number: at7601fg
• Description: Printer Port Controller
• Manufacturer: AME, Inc.

Rev. B.02
AT7601F
5-3-1.4 C-FIFO (Parallel Port Data FIFO) Mode = 010
5-3-1.5 ECP- DFIFO (ECP Data FIFO) Mode = 011
5-3-1.6 T- FIFO (Test FIFO Mode) Mode = 110
5-3-1.7 Cnfg-A (Configuration Register A) Mode = 111
Data bytes may be read, written or DMAed to or from the system to this FIFO in any direction.
Bytes written or DMAed from the system to this FIFO are transmitted by a hardware handshake to the
peripheral using the standard parallel port protocol. Transfers to the FIFO are byte aligned. This mode is
only defined for the forward direction.
Bytes written or DMAed from the system to this FIFO, when the direction bit is 0, are transmitted by a
hardware handshake to the peripheral using the ECP parallel port protocol. Transfers to the FIFO are byte
aligned. Data bytes from the peripheral are read under automatic hardware handshake from ECP into this
FIFO when the direction bit is 1. Reads or DMAs from the FIFO will return bytes of ECP data to the
system.
Data in the T-FIFO will not be transmitted to the parallel port lines using a hardware protocol
handshake. However, data in the T-FIFO may be displayed on the parallel port data lines.
The T-FIFO will not stall when overwritten or underrun. If an attempt is made to write data to a full T-FIFO,
the new data is not accepted into the T-FIFO. If an attempt is made to read data from an empty T-FIFO,
the last data byte is re-read again. The full and empty bits must always keep track of the correct FIFO
state. The T-FIFO will transfer data at the maximum ISA rate so that software may generate performance
metrics.
The FIFO size and interrupt threshold can be determined by writing bytes to the FIFO and checking the
full and ServiceIntr bits.
The writeIntrThreshold can be determined by starting with a full T-FIFO, setting the direction bit to 0 and
emptying it a byte at a time until ServiceIntr is set. This may generate a spurious interrupt, but will
indicate that the threshold has been reached.
The readIntrThreshold can be determined by setting the direction bit to 1 and filling the empty T-FIFO a
byte at a time until ServiceIntr is set. This may generate a spurious interrupt, but will indicate that the
threshold has been reached.
Data bytes are always read from the head of T-FIFO regardless of the value of the direction bit. For
example if 44h, 33h, 22h is written to the FIFO, then reading the T-FIFO will return 44h, 33h, 22h in the
same order as was written.
This register is a read only register. When read, 10H is returned. This indicates to the system that this is
an 8-bit implementation. (PWord =1 byte)
AME, Inc.
ADDRESS OFFSET = 400H
ADDRESS OFFSET = 400H
ADDRESS OFFSET = 400H
ADDRESS OFFSET = 400H
Printer Port Controller
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