alc268 Realtek Semiconductor Corporation, alc268 Datasheet - Page 28

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alc268

Manufacturer Part Number
alc268
Description
2+2 Channel High Definition Audio Codec
Manufacturer
Realtek Semiconductor Corporation
Datasheet

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7.3. Reset and Initialization
There are two types of reset within an HDA link:
• Link Reset. Generated by assertion of the RST# signal, all codecs return to their power on state
• Codec Reset. Generated by software directing a command to reset a specific codec back to its default
An initialization sequence is requested after any of the following three events:
1. Link Reset
2. Codec Reset
3. Codec changes its power state (For example, hot docking a codec to an HDA system)
7.3.1.
A link reset may be caused by 3 events:
1. The HDA controller asserts RST# for any reason (power up, or PCI reset)
2. Software initiates a link reset via the ‘CRST’ bit in the Global Control Register (GCR) of the HDA
controller
3. Software initiates power management sequences. Figure 14, page 21, shows the ‘Link Reset’ timing
including the ‘Enter’ sequence ( ~ ) and ‘Exit’ sequence ( ~ )
Enter ‘Link Reset’:
link reset
end of the frame
2+2 Channel High Definition Audio Codec
Software writes a 0 to the ‘CRST’ bit in the Global Control Register of the HDA controller to initiate a
The controller drives SYNC and all SDOs to low. Codecs also drive SDIs to low
The controller asserts the RST# signal to low, and enters the ‘Link Reset’ state
All link signals driven by controller and codecs should be tri-state via internal pull-low resistors
As the controller completes the current frame, it does not signal the normal 8-Bit frame SYNC at the
state
Link Reset
20
Track ID: JATR-1076-21
ALC268 Series
Datasheet
Rev. 1.3

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