alc272 Realtek Semiconductor Corporation, alc272 Datasheet - Page 18

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alc272

Manufacturer Part Number
alc272
Description
4 Channel High Definition Audio Codec
Manufacturer
Realtek Semiconductor Corporation
Datasheet

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7.1.1.
4 Channel High Definition Audio Codec
Signal Name
RESET#
BCLK
SYNC
RESET#
SDO
Item
SDI
BCLK
SYNC
SDO
SDI
BCLK
SYNC
SDO
SDI
Signal Definitions
Description
24.0MHz bit clock sourced from the HDA controller and connecting to all codecs.
A 48kHz signal used to synchronize input and output streams on the link. It is sourced from the HDA
controller and connects to all codecs.
Serial Data Output signal driven by the HDA controller to all codecs. Commands and data streams are
carried on SDO. The data rate is double-pumped; the controller drives data onto the SDO, the codec samples
data present on SDO with respect to each edge of BCLK. The HDA controller must support at least one
SDO. To extend outbound bandwidth, multiple SDOs may be supported.
Serial Data Input signal driven by the codec. This is point-to-point serial data from the codec to the HDA
controller. The controller must support at least one SDI. Up to a maximum of 15 SDI’s can be supported.
SDI is driven by the codec at each rising edge of BCLK, and sampled by the controller at each rising edge of
BCLK. SDI can be driven by the controller to initialize the codec’s ID.
Active low reset signal. Asserted to reset the codec to default power-on state. RESET# is sourced from the
HDA controller and connects to all codecs.
Codec/Controller
Controller
Controller
Controller
Controller
Source
Controller samples SDI at rising edge of BCLK
Type for Controller Description
Input/Output
Codec samples SDO at both rising and falling edge of BCLK
Table 6.
Output
Output
Output
Output
8-Bit Frame SYNC
7
3
6
Table 5.
Figure 4.
5
2
4
HDA Signal Definitions
3
1
2
Global 24.0MHz bit clock.
Global 48kHz Frame Sync and outbound tag signal.
Serial data output from controller.
Serial data input from codec. Weakly pulled down by the
controller.
Global active low reset signal.
Link RESET#
10
1
0
Bit Timing
0
999 998 997 996 995 994 993 992 991 990
499
Start of Frame
498
497
496
Track ID: JATR-1076-21
495
494
Datasheet
ALC272
Rev. 1.0

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