alc250-lf Realtek Semiconductor Corporation, alc250-lf Datasheet - Page 34
![no-image](/images/no-image-200.jpg)
alc250-lf
Manufacturer Part Number
alc250-lf
Description
Two-channel Ac?97 2.3 Audio Codec With Equalizer
Manufacturer
Realtek Semiconductor Corporation
Datasheet
1.ALC250-LF.pdf
(47 pages)
- Current page: 34 of 47
- Download datasheet (645Kb)
7.1.4 S/PDIF output Characteristics
Dvdd= 3.3V, T
7.2 AC Timing Characteristics
7.2.1 Cold Reset
7.2.2 Warm Reset
7.2.3 AC-Link Clocks
Two-Channel AC’97 2.3 Audio Codec
High level output voltage
Low level output voltage
RESET# active low pulse width
RESET# inactive to BIT_CLK
Startup delay
SYNC active high pulse width
SYNC inactive to BIT_CLK
Startup delay
BIT_CLK frequency
BIT_CLK period
BIT_CLK output jitter
BIT_CLK high pulse width (note 2)
BIT_CLK low pulse width (note 2)
SYNC frequency
SYNC period
SYNC high pulse width
SYNC low pulse width
Note 1: Worse case duty cycle restricted to 45/55.
Parameter
Parameter
Parameter
Parameter
ambient
=25
0
C, with 75Ω external load.
T
T
Symbol
Symbol
Symbol
T
Symbol
T
T
T
T
T
T
sync_period
T
clk_period
sync_high
sync_high
sync_low
V
sync2clk
clk_high
V
clk_low
rst_low
rst2clk
OH
OL
Warm reset timing diagram
Cold reset timing diagram
Minimum
Minimum
Minimum
Minimum
162.8
162.8
3.0
1.0
1.0
36
36
-
-
-
-
-
-
-
-
29
Typical
Typical
Typical
Typical
12.288
81.4
40.7
40.7
48.0
20.8
19.5
3.3
1.3
0
-
-
-
-
-
Maximum
Maximum
Maximum
Maximum
750
0.5
ALC250 DataSheet
45
45
-
-
-
-
-
-
-
-
-
-
Units
Units
Units
Units
MHz
KHz
µs
ns
µs
ns
ns
ps
ns
ns
µs
µs
µs
V
V
Rev1.3
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