MK50H27DIP ST Microelectronics, Inc., MK50H27DIP Datasheet - Page 23

• Manufacturer Part Number: MK50H27DIP
• Description: Signalling System 7 Link Controller
• Manufacturer: ST Microelectronics, Inc.

4.1.2.6 Control and Status Register 5 (CSR5)
CSR5 facilitates control and monitoring of modem controls.
RAP<3:1> = 5
BIT
15:05
4
3
2
1
0
RTSEN
DTRD
DSRD
DTR
DSR
NAME
0
1
5
0
1
4
0
1
3
0
1
2
0
and 30. If this bit is set, pin 26 becomes RTS and pin 30 becomes
CTS. RTS is driven low whenever the MK50H27 has data to trans-
mit and is kept low during transmission. RTS will be driven high
after the closing flag of a signal unit is transmited if either no other
frames are in the FIFO or if the minimum signal unit spacing is
higher than 2 (see Mode Register).
transmission and TD will remain HIGH if CTS is high. If RTSEN = 0
then pins 26 and 30 become programmable I/O pins DTR and
DSR. The direction and behavior of DSR and DTR are controlled by
the following bits.
of the DTR pin. If DTRD = 0, the DTR pin becomes an input pin and
the DTR bit reflects the current value of the pin; if DTRD = 1, the DTR
pin is an output pin controlled by the DTR bit below.
of the DSR pin. If DSRD = 0, the DSR pin becomes an input pin
and the DSR bit reflects the current value of the pin; if DSRD = 1, the
DSR pin is an output pin controlled by the DSR bit below.
pin depending on the value of DTRD. If DTRD = 0, this bit be-
comes READ ONLY and always equals the current value of the DTR
pin. If DTRD = 1, this bit becomes READ/WRITE and any value
written to this bit appears on the DTR pin.
pin depending on the value of DSRD. If DSRD = 0, this bit be-
comes READ ONLY and always equals the current value of the DSR
pin. If DSRD = 1 this bit becomes READ/WRITE and any value
written to this bit appears on the DSR pin.
Reserved, must be written as zeroes.
RTS/CTS ENABLE is a READ/WRITE bit used to configure pins 26
DTR DIRECTION is a READ/WRITE bit used to control the direction
DSR DIRECTION is a READ/WRITE bit used to control the direction
DATA TERMINAL READY is used to control or observe the DTR I/O
DATA SET READY is used to control or observe the DSR I/O
DESCRIPTION
1
1
0
1
0
0
0
9
0
0
8
0
0
7
0
0
6
0
0
5
X
E
D
G
E
0
4
R
T
S
E
N
0
3
D
T
R
D
The MK50H27 will not begin
0
2
D
S
R
D
0
1
D
T
R
0
0
D
S
R
MK50H27
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