alc883 Realtek Semiconductor Corporation, alc883 Datasheet - Page 29
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alc883
Manufacturer Part Number
alc883
Description
7.1+2 Channel High Definition Audio Codec
Manufacturer
Realtek Semiconductor Corporation
Datasheet
1.ALC883.pdf
(78 pages)
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7.4.2.
There are two types of response from the codec to the controller. Solicited Responses are returned by the
codec in response to a current command verb. The codec will send Solicited Response data in the next
frame, without regard to the Set (Write) or Get (Read) command. The 32-Bit Response is interpreted by
software, opaque to the controller.
Unsolicited Responses are sent by the codec independently of software requests. Jack Detection or GPI
status information can be actively delivered to the controller and interpreted by software. The ‘Tag’ in
Bit[31:28] is used to identify unsolicited events. This tag is undefined in the HDA specifications.
Note: The response stream in the link protocol is 36-Bits wide. The response is placed in the lower
7.5. Power Management
The ALC883 series does not support Wake-Up events when in low power mode. All power management
state changes in widgets are driven by software. Table 14 shows the System Power State Definitions.
In the ALC883 series, all the widgets, including output/input converters, support power control. Software
may have various power states depending on system configuration. Table 15 indicates those nodes that
support power management. To simplify power control, software can configure whole codec power states
through the audio function (NID=01h). Output converters (DACs) and input converters (ADCs) have no
individual power control to supply fine-grained power control.
7.1+2 Channel High Definition Audio Codec
Power States
D3 (Cold)
D3 (Hot)
D0
D1
D2
32-bit field. Bit-35 is a ‘Valid’ bit to indicate the response is ‘Ready’. Bit-34 is set to indicate that
an unsolicited response was sent.
Response Format
Bit [35]
Valid
Definitions
All power on. Individual DACs and ADCs can be powered up or down as required
All amplifiers and converters (DACs and ADCs) are powered down. State maintained, analog reference
stays up
All amplifiers and converters (DACs and ADCs) are powered down. State maintained, but analog
reference is off (D1 + analog reference off)
Power still supplied. The codec stops the internal clock. State is maintained
All power removed. State lost
Bit [35]
Valid
Unsol=1
Bit [34]
Table 14. System Power State Definitions
Table 13. Unsolicited Response Format
Table 12. Solicited Response Format
Unsol=0
Bit [34]
Bit [33:32]
Reserved
Bit [33:32]
21
Reserved
Bit [31:28]
Tag
Track ID: JATR-1076-21
Bit [31:0]
Response
Bit [27:0]
Response
ALC883 Series
Datasheet
Rev. 1.3