74LVC10APW,118 NXP Semiconductors, 74LVC10APW,118 Datasheet - Page 9

IC TRIPLE 3-IN NAND GATE 14TSSOP

74LVC10APW,118

Manufacturer Part Number
74LVC10APW,118
Description
IC TRIPLE 3-IN NAND GATE 14TSSOP
Manufacturer
NXP Semiconductors
Series
74LVCr
Datasheet

Specifications of 74LVC10APW,118

Number Of Circuits
3
Package / Case
14-TSSOP
Logic Type
NAND Gate
Number Of Inputs
3
Current - Output High, Low
24mA, 24mA
Voltage - Supply
1.2 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Product
NAND
Logic Family
LVC
High Level Output Current
- 24 mA
Low Level Output Current
24 mA
Propagation Delay Time
3.9 ns
Supply Voltage (max)
3.6 V
Supply Voltage (min)
1.2 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
74LVC10APW-T
74LVC10APW-T
935260748118
Philips Semiconductors
PACKAGE OUTLINES
2003 Jun 20
SO14: plastic small outline package; 14 leads; body width 3.9 mm
Triple 3-input NAND gate
DIMENSIONS (inch dimensions are derived from the original mm dimensions)
Note
1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included.
inches
UNIT
mm
VERSION
OUTLINE
SOT108-1
0.069
max.
1.75
A
0.010
0.004
0.25
0.10
A
14
1
1
Z
pin 1 index
y
0.057
0.049
1.45
1.25
A
2
076E06
IEC
0.01
0.25
e
A
3
0.019
0.014
0.49
0.36
b
p
D
0.0100
0.0075
0.25
0.19
MS-012
JEDEC
c
REFERENCES
0.35
0.34
8.75
8.55
D
(1)
0
0.16
0.15
E
4.0
3.8
b
(1)
p
8
7
JEITA
scale
1.27
0.05
2.5
9
e
w
M
c
0.244
0.228
H
6.2
5.8
E
A
2
0.041
5 mm
1.05
A
L
1
0.039
0.016
1.0
0.4
L
p
H
E
E
0.028
0.024
detail X
0.7
0.6
Q
PROJECTION
L
L
EUROPEAN
0.25
0.01
p
Q
v
(A )
3
A
0.25
0.01
w
Product specification
0.004
A
0.1
74LVC10A
X
v
y
M
ISSUE DATE
99-12-27
03-02-19
A
0.028
0.012
Z
0.7
0.3
(1)
SOT108-1
8
0
o
o

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