mu9c4481l-10dc Music Semiconductors, Inc., mu9c4481l-10dc Datasheet - Page 3
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mu9c4481l-10dc
Manufacturer Part Number
mu9c4481l-10dc
Description
Lancam 1st Family
Manufacturer
Music Semiconductors, Inc.
Datasheet
1.MU9C4481L-10DC.pdf
(20 pages)
All signals are implemented in CMOS technology with TTL levels. Signal names that start with a slash (“/”) are active LOW. Inputs
should never be left floating. The CAM architecture draws large currents during compare operations, mandating the use of good layout
and bypassing techniques. Refer to the Electrical Characteristics section for more information.
/E (Chip Enable, Input, TTL)
The /E input enables the device while LOW. The falling
edge registers the control signals /W and /CM. The rising
edge turns off the DQ pins and clocks the Destination and
Source Segment counters. The four cycle types enabled
by /E are shown in Table 2 on page 2.
/W (Write Enable, Input, TTL)
The /W input selects the direction of data flow during a
device cycle. /W LOW selects a Write cycle and /W HIGH
selects a Read cycle.
/CM (Data/Command Select, Input, TTL)
The /CM input selects whether the input signals on
DQ15–0 are data or commands. /CM LOW selects Command
cycles and /CM HIGH selects Data cycles.
DQ15–0 (Data Bus, I/O, TTL)
The DQ15–0 lines convey data, commands, and status to
and from the LANCAM 1
direction and nature of the information that flows to or
from the device. When /E is HIGH, DQ15–0 go to Hi-Z.
/MF (Match Flag, Output, TTL)
The /MF output goes LOW when one or more valid
matches occur during a compare cycle. /MF is HIGH if
there is no match. /MF will be reset when the active
configuration register set is changed.
ST
. /W and /CM control the
PIN DESCRIPTIONS
3
/FF (Full Flag, Output, TTL)
The /FF output goes LOW when no empty memory
locations exist within the device.
/RESET (Reset, Input, TTL)
/RESET must be driven LOW to place the device in a known
state before operation, which will reset the device to the
conditions shown in Table 4 on page 8. The /RESET pin
should be driven by TTL levels, not directly by an RC time-
out. /E must be kept HIGH during /RESET.
TEST1, TEST2 (Test, Input, TTL)
These pins enable MUSIC production test modes that are
not usable in an application. They should be connected to
ground, either directly or through a pull-down resistor, or
they may be left unconnected. These pins may not be
implemented on all versions of these products.
VCC, GND (Positive Power Supply, Ground)
These pins are the power supply connections to the
LANCAM 1
requirements in the Operating Conditions section relative
to the GND pins, which are at 0 Volts (system reference
potential), for correct operation of the device. All the
ground and power pins must be connected to their
respective planes with adequate bulk and high frequency
bypassing capacitors in close proximity to the device.
ST
. VCC must meet the voltage supply
LANCAM 1
ST
Family
Rev. 1a