mu9c4320l-90tdi Music Semiconductors, Inc., mu9c4320l-90tdi Datasheet - Page 23

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mu9c4320l-90tdi

Manufacturer Part Number
mu9c4320l-90tdi
Description
Mu9c4320l Atmcam
Manufacturer
Music Semiconductors, Inc.
Datasheet
Rev. 3
Control State Descriptions
Control State:
Mnemonic:
Binary Op Code: XXX nnn 001 101
/W: LOW
Description: Moves data from the Comparand Register to
the Next Free address. In a vertically cascaded system, the
write will take place in the device whose /FI=LOW and
/FF=HIGH, and at the highest-priority location whose
Validity bit is set HIGH. The validity of the location is set
by the state of the /VB input, /VB = LOW: Valid, /VB =
HIGH: Empty. The move is masked by the contents of
Mask Register nnn. When nnn=000 no mask is used; when
masking is selected, only bits in the addressed location
that correspond to LOW values in the selected mask
register are updated.
Control State:
Mnemonic:
Binary Op Code: XXX nnn 001 110
/W: LOW
Description: Moves data from the Comparand register to
the Highest-Priority Matching address from the previous
Comparison cycle. The validity of the location is set by the
state of the /VB input, /VB = LOW: Valid, /VB = HIGH:
Empty. The move is masked by the contents of Mask
Register nnn. When nnn=000 no mask is used; when
masking is selected, only bits in the addressed location
that correspond to LOW values in the selected mask
register are updated.
Control State:
Mnemonic:
Binary Op Code: XXX nnn 001 110
/W: HIGH
Description: Moves data from the Highest-Priority Match
address from the previous Comparison cycle to the
Comparand register. The move is masked by the contents
of Mask Register nnn. When nnn=000 no mask is used;
when masking is selected, only bits in the addressed
location that correspond to LOW values in the selected
mask register are updated. Note that the /VB line is not
driven during this operation.
/AV: HIGH
/AV: HIGH
/AV: HIGH
Move Data from Comparand
Register to Next Free Address
MOV [NFA],CR{MRnnn}
Move Data from Comparand
Register to Highest-Priority
Matching Location
MOV [HPM],CR{MRnnn}
Matching Location to
Comparand Register
MOV CR,[HPM]{MRnnn}
Move Data from Highest-Priority
PA:AA: NFA
PA:AA: HPMA
PA:AA: HPMA
Scope: NFD
Scope: HPD
Scope: HPD
23
Comparison
Control State:
Mnemonic:
Binary Op Code: XXX nnn 011 000
/W: LOW
Description: The Comparand register is compared with
all locations in the Memory array that have their Validity
bits set LOW. The comparison is masked by the contents
of Mask Register nnn. When nnn=000 no mask is used;
when masking is selected, only bits that correspond to
LOW values in the selected mask register are compared.
Control State:
Mnemonic:
Binary Op Code: XXX nnn 011 001
/W: LOW
Description: The data from the DQ bus is compared with
all locations in the Memory array that have their Validity
bits set LOW. The comparison is masked by the contents
of Mask Register nnn. When nnn=000 no mask is used;
when masking is selected, only bits that correspond to
LOW values in the selected mask register are compared.
Control State:
Mnemonic:
Binary Op Code: XXX nnn 011 010
/W: LOW
Description: The data from the DQ bus is compared with
all locations in the Memory array that have their Validity
bits set LOW. The data from the DQ31–0 bus is written to
the Comparand register. The comparison is masked by the
contents of Mask Register nnn. When nnn=000 no mask is
used; when masking is selected, only bits that correspond
to LOW values in the selected mask register are compared.
Note that the selected mask register masks the comparison
and not the write to Comparand register.
Control State:
Mnemonic:
Binary Op Code: XXX nnn 011 011
/W: LOW
Description: Advances the Match address to the next
matching location when the previous Comparison cycle
resulted in a multiple match. The /MF flag will go HIGH
when all matches have been exhausted, therefore the
scheme operates in vertically cascaded systems through
the priority daisy chain.
/AV: HIGH
/AV: HIGH
/AV: HIGH
/AV: HIGH
Compare Comparand Register
with Memory Array
CMP CR,{MRnnn}
Compare Data Bus with
Memory Array
CMP DQ,{MRnnn}
Compare Data Bus with Memory
Array; Write Data Bus to
Comparand Register
CMPW DQ,{MRnnn}
Advance to Next Matching Location
INC MA
PA:AA: HPMA
PA:AA: HPMA
PA:AA: HPMA
PA:AA: HPMA
MU9C4320L ATMCAM
Scope: AS
Scope: AS
Scope: AS
Scope: HPD

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