sii1162 Silicon image, sii1162 Datasheet - Page 13

• Manufacturer Part Number: sii1162
• Description: Panellink Transmitter
• Manufacturer: Silicon image

SiI 1162 PanelLink Transmitter
Data Sheet
Data De-skew
Input clock to data setup/hold time can be adjusted through the use of the de-skew feature. It should be noted
that it is the clock that is being adjusted internally. The configuration pins DK[1:0] or applicable I
be used to vary the input setup/hold time by T
If ISEL/RST# pin is set LOW and the SiI 1162 is not in I
value. The DK[1:0] pins contain internal pull-down resistors and if left unconnected, they will be set to 00. If
ISEL/RST# pin is set HIGH and the SiI 1162 is in I
Table 2 lists the De-skew time increment range and the effect on Setup and Hold.
SiI -DS-0081-B
DK[1:0]
DE,
HSYNC,
VSYNC,
D[11:0]
IDCK+
IDCK-
01
00
10
11
DK[1:0]
Table 2. DK[1:0] Increments and Effect on Setup and Hold times
+100ps to +400ps
-100ps to -400ps
De-Skew Time
01
(T
0 ps
0 ps
Figure 12. SiI 1162 De-skewing Feature Timing
-T
CD
CD
)
default
00
T
CD
10
CD
.
2
C mode, the DK[1:0] bits can be used to control the T
No effect. Default and recommended setting.
2
9
C mode, the DK[1:0] pins can be used to control the T
Better Setup time, higher Hold time.
Better Hold time, higher Setup time.
No effect but not recommended.
Setup and Hold Time Effect
2
C registers can
CD
value
CD