gl848 Genesys Logic, gl848 Datasheet - Page 32

• Manufacturer Part Number: gl848
• Description: High Speed Usb 2.0 2-in-1 Scanner Controller With Fast Adf & Bus Power
• Manufacturer: Genesys Logic

©2000-2007 Genesys Logic Inc. - All rights reserved.
Offset 21h ……..……………………………………..…………..….…..…….…. Default value = 8’h00
Offset 22h ……..……………………………………..…………..….…..…….…. Default value = 8’h00
Offset 23h ……..……………………………………..…………..….…..…….…. Default value = 8’h00
Offset 24h ……..……………………………………..…………..….…..…….…. Default value = 8’h00
FWDSTEP7 FWDSTEP6 FWDSTEP5 FWDSTEP4 FWDSTEP3 FWDSTEP2 FWDSTEP1 FWDSTEP0
7-0 BUFSEL [7:0]
7-0 STEPNO [7:0] Steps number of “table one” for the acceleration/deceleration of scanning moving.
7-0 FWDSTEP [7:0] Steps number for forward moving when buffer condition is met.
7-0 BWDSTEP [7:0] Steps number for backward moving when image buffer is full.
7-0 FASTNO [7:0] Steps number of “table two” for the acceleration/deceleration when image buffer
BWDSTEP7 BWDSTEP6 BWDSTEP5 BWDSTEP4 BWDSTEP3 BWDSTEP2 BWDSTEP1 BWDSTEP0
FASTNO7 FASTNO6 FASTNO5 FASTNO4 FASTNO3 FASTNO2 FASTNO1 FASTNO0
BUFSEL7
STEPNO7
R/W
R/W
R/W
R/W
R/W
GL848 High Speed USB2.0 2-in-1 Scanner Controller With Fast ADF
STEPNO6
BUFSEL6
R/W
R/W
R/W
R/W
R/W
To set buffer condition.
When buffer is full, scanner will stop and wait for host to read out image data
from SDRAM.
The valid data count (has not been read) is represented by VALIDWORD (in word).
If VALIDWORD < buffer condition, then the scanner will re-start to scan.
Please refer to section 6.19 and the descriptions of Reg24 & Reg6A.
Note: 1.It cannot be programmed to logic zero.
Please refer to section 6.19 and the descriptions of Reg20 & Reg24.
Note: 1.It cannot be programmed to logic zero.
Please refer to section 6.19 and the descriptions of Reg24.
Note: 1.It cannot be programmed to logic zero.
is full.
Please refer to section 6.19 and the descriptions of Reg20.
Note: It cannot be programmed to logic zero.
64M bits SDRAM
128M bits SDRAM : 32K words
256M bits SDRAM : 64K words
512M bits SDRAM : 128K words
Following are the units of this register under various SDRAM size.
16M bits SDRAM
STEPNO5
BUFSEL5
2.it can be multiplied by2*
2.it can be multiplied by2*
2.it can be multiplied by2*
R/W
R/W
R/W
R/W
R/W
BUFSEL4
STEPNO4
R/W
R/W
R/W
R/W
R/W
: 4k words
: 16k words
STEPNO3
BUFSEL3
STEPTIM
STEPTIM
STEPTIM
R/W
R/W
R/W
R/W
R/W
STEPNO2
BUFSEL2
R/W
R/W
R/W
R/W
R/W
BUFSEL1
STEPNO1
R/W
R/W
R/W
R/W
R/W
STEPNO0
BUFSEL0
Page 32
R/W
R/W
R/W
R/W
R/W