74LVC3G14DC,125 NXP Semiconductors, 74LVC3G14DC,125 Datasheet - Page 19
![IC TRPL INV SCHMITT TRIG 8VSSOP](/photos/6/94/69485/8-vssop_sot765-1_sml.jpg)
74LVC3G14DC,125
Manufacturer Part Number
74LVC3G14DC,125
Description
IC TRPL INV SCHMITT TRIG 8VSSOP
Manufacturer
NXP Semiconductors
Series
74LVCr
Datasheet
1.74LVC3G17GD125.pdf
(23 pages)
Specifications of 74LVC3G14DC,125
Number Of Circuits
3
Logic Type
Inverter with Schmitt Trigger
Package / Case
US8, 8-VSSOP
Number Of Inputs
1
Current - Output High, Low
32mA, 32mA
Voltage - Supply
1.65 V ~ 5.5 V
Operating Temperature
-40°C ~ 125°C
Mounting Type
Surface Mount
Logic Family
74LVC
High Level Output Current
- 32 mA
Low Level Output Current
32 mA
Propagation Delay Time
3.8 ns, 3.2 ns , 2.4 ns
Supply Voltage (max)
5.5 V
Supply Voltage (min)
1.65 V
Maximum Operating Temperature
+ 125 C
Minimum Operating Temperature
- 40 C
Mounting Style
SMD/SMT
Operating Supply Voltage
1.8 V, 2.5 V, 3.3 V, 5 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
74LVC3G14DC-G
74LVC3G14DC-G
935275559125
74LVC3G14DC-G
935275559125
NXP Semiconductors
Fig 22. Package outline SOT1203 (XSON8)
74LVC3G14
Product data sheet
XSON8: extremely thin small outline package; no leads;
8 terminals; body 1.35 x 1.0 x 0.35 mm
Dimensions
Note
1. Including plating thickness.
2. Visible depending upon used manufacturing technology.
mm
SOT1203
Unit
Outline
version
max
nom
min
0.35 0.04
A
(1)
A
1
terminal 1
index area
0.20
0.15
0.12
e
b
(8×)
IEC
L
(2)
1.40
1.35
1.30
1
D
1.05
1.00
0.95
E
1
8
0.55 0.35
e
JEDEC
e
1
All information provided in this document is subject to legal disclaimers.
2
7
e
1
References
e
D
1
0.35
0.30
0.27
Rev. 8 — 19 August 2010
0
L
3
6
0.40
0.35
0.32
e
L
1
1
JEITA
b
4
5
scale
Triple inverting Schmitt trigger with 5 V tolerant input
0.5
A
E
L
1
A
1 mm
(4×)
(2)
European
projection
74LVC3G14
© NXP B.V. 2010. All rights reserved.
Issue date
10-04-02
10-04-06
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