PLL103-02D PhaseLink (PLL), PLL103-02D Datasheet - Page 2

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PLL103-02D

Manufacturer Part Number
PLL103-02D
Description
Standard Clock Buffer (SDRAM And DDR) , 12x2 Ddr, 66 - 170MHz in
Manufacturer
PhaseLink (PLL)
Datasheet
PIN DESCRIPTIONS
47745 Fremont Blvd., Fremont, California 94538 TEL (510) 492-0990 FAX (510) 492-0991
DDR[0:11]C
DDR[0:11]T
BUF_IN
VDD2.5
FBOUT
Name
GND
N/C
PD
4,6,10,15,19,
5,7,11,16,20,
2,8,12,17,23,
3,9,14,18,26,
21,28,30,34,
22,27,29,33,
32,37,41,47
31,35,40,46
Number
39,43,45
38,42,44
DDR SDRAM Buffer for Desktop PCs with 4 DDR DIMMS
13
36
48
1
Type
O
O
O
P
P
I
I
Feedback clock for chipset.
Reference input from chipset.
Power Down Control input. When low, it will tri-state all outputs.
Not connected.
These outputs provide True copies of BUF_IN.
These outputs provide complementary copies of BUF_IN.
2.5V power supply.
Ground.
Description
PLL103-02 Rev.D
Rev 01/11/01 Page 2

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