PLL130-05 PhaseLink (PLL), PLL130-05 Datasheet - Page 2

• Manufacturer Part Number: PLL130-05
• Description: Output Level Converter Buffer , 1 PaIR Out, Translator to Pecl, < 800MHz (Inv. OE)
• Manufacturer: PhaseLink (PLL)

PIN DESCRIPTIONS
ELECTRICAL SPECIFICATIONS
1. Absolute Maximum Ratings
Exposure of the device under conditions beyond the limits specified by Maximum Ratings for extended periods may cause permanent damage to the
device and affect product reliability. These conditions represent a stress rating only, and functional operations of the device at these or any other con-
ditions above the operational limits noted in this specification is not implied.
* Note: Operating Temperature is guaranteed by design for all parts (COMMERCIAL and INDUSTRIAL), but tested for INDUSTRIAL grade only.
2. AC Specification
47745 Fremont Blvd., Fremont, California 94538 TEL [phone] FAX [phone]
PECL_BAR
Supply Voltage Range
Input Voltage Range
Output Voltage Range
Soldering Temperature
Storage Temperature
Ambient Operating Temperature*
Input Frequency
Input signal swing
Output Frequency
Output Rise Time
Output Fall Time
REF_IN
Name
PECL
GND
VDD
OE
(use PLL130-08)
(use PLL130-08)
(use PLL130-08)
(use PLL130-08)
(use PLL130-08)
(use PLL130-08)
PARAMETERS
8pin SOIC Pin
number
PARAMETERS
High Speed Translator Buffer to PECL (Enable Low)
3x3mm QFN
Pin number
9,13,14,15
7,10,11,12
1,2,4,5,
16
3
6
8
REF_IN input
0.8V to 2.0V with no load
2.0V to 0.8V with no load
Type
O
O
P
P
I
I
CONDITIONS
Ground connector
3.3V Power supply
Reference input signal. The frequency of this signal will be
reproduced at the output (after translation to PECL level).
PECL True output.
PECL Complementary output.
Output enable (‘0’ for enable).
Internal pull-down (default is ‘0’).
SYMBOL
V
V
T
T
V
CC
O
S
A
I
Preliminary
MIN.
100
MIN.
0
0
-
-
-
-65
-40
Description
0.5
0.5
0.5
TYP.
PLL130-05
V
V
MAX.
CC
CC
260
150
85
7
+
+
0.5
0.5
Rev 11/06/02 Page 2
MAX.
1300
1300
1.5
1.5
UNITS
UNITS
V
V
V
MHz
MHz
C
C
C
mV
ns
ns