PLL601-12 PhaseLink (PLL), PLL601-12 Datasheet

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PLL601-12

Manufacturer Part Number
PLL601-12
Description
, Odd Multipliers, 2 Outs,
Manufacturer
PhaseLink (PLL)
Datasheet
FEATURES
DESCRIPTIONS
The PLL601-12 is a highly flexible XO with select-
able multipliers and two CMOS outputs (one of which
can be selected to be REF_CLK). Thanks to Phase-
Link’s advanced Phase Locked Loop technology, it
allows a wide choice of selectable multipliers which
permits the user to achieve useful frequencies from
standard low cost crystals. It accepts fundamental
parallel resonant mode crystals from 13 to 31MHz,
and is ideal to generate 156.25MHz from a standard
25MHz crystal.
BLOCK DIAGRAM
47745 Fremont Blvd., Fremont, California 94538 TEL (510) 492-0990 FAX (510) 492-0991
XOUT
Selectable multipliers (x2.5, x2.75, x3, x4.25, x5,
x5.5, x5.75, x6, x6.25, x10, x11, x11.5, x12,
x12.5).
Crystal range from 13MHz to 31MHz (see Selec-
tion Table for detailed acceptable input ranges).
Maximum output frequency: 312.5MHz
2 CMOS outputs.
Selectable output drive (Standard or High-Drive).
Selectable REF_CLK output.
3.3V operation.
Available in 14-Pin SOP.
[S3,S0]
XIN
Oscillator
Amplifier
(Phase
Locked
Loop)
PLL
Dual Output PLL Clock with Selectable Odd Multiplier
REF_SEL
CLK2/REF_CLK
CLK1
PLL601-12
^: Internal pull-up.
DRIVE_SEL^
PIN CONFIGURATION
XOUT
GND
VDD
S3^
S2^
XIN
Preliminary
(Top View)
1
2
3
4
5
6
7
PLL601-12
14
13
12
11
10
9
8
Rev 04/08/03 Page 1
S0^
S1^
REF_SEL^
CLK2/
REF_CLK
VDD
CLK1
GND

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PLL601-12 Summary of contents

Page 1

... Selectable REF_CLK output. 3.3V operation. Available in 14-Pin SOP. DESCRIPTIONS The PLL601- highly flexible XO with select- able multipliers and two CMOS outputs (one of which can be selected to be REF_CLK). Thanks to Phase- Link’s advanced Phase Locked Loop technology, it allows a wide choice of selectable multipliers which permits the user to achieve useful frequencies from standard low cost crystals ...

Page 2

... Selector pin. This pin if set to ‘0’ selects REF_CLK on pin 10 not connected, it defaults to ‘1’ (pin 10 = CLK2). Internal pull-up Multiplier selector pins. These pins have an internal pull-up that will default SEL to ‘1’ when not connected to GND +3.3V VDD. PLL601-12 Preliminary Multiplier Reserved Reserved X 4. 12 ...

Page 3

... Crystal Loading Rating Recommended ESR 47745 Fremont Blvd., Fremont, California 94538 TEL (510) 492-0990 FAX (510) 492-0991 SYMBOL SYMBOL CONDITIONS Parallel Fundamental Mode F XIN (see Selection Table) At VCON = 1.65V C (xtal cut R E PLL601-12 Preliminary MIN. MAX 0 ...

Page 4

... CONDITIONS Fout < 30 MHz 15 pF load 30MHz < Fout < 100MHz Fout > 100MHz SYMBOL CONDITIONS 0.8V ~ 2.0V with 10 pF load 0.3V ~ 3.0V with 15 pF load 2.0V ~ 0.8V with 10 pF load 3.0V ~ 0.3V with 15pF load Measured @ 1.4V CONDITIONS FREQUENCY Worst case PLL601-12 Preliminary MIN. TYP. MAX. UNITS 15* 30* 40* 2.97 3.63 50 MIN. TYP. MAX. ...

Page 5

... LIFE SUPPORT POLICY: PhaseLink’s products are not authorized for use as critical components in life support devices or systems without the ex- press written approval of the President of PhaseLink Corporation. 47745 Fremont Blvd., Fremont, California 94538 TEL (510) 492-0990 FAX (510) 492-0991 A1 e 47745 Fremont Blvd., Fremont, CA 94538, USA Tel: (510) 492-0990 Fax: (510) 492-0991 PART NUMBER PLL601- PLL601-12 Preliminary ...

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