CY28510OC SPECTRALINEAR [SpectraLinear Inc], CY28510OC Datasheet - Page 5

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CY28510OC

Manufacturer Part Number
CY28510OC
Description
Peripheral I/O Clock Generator
Manufacturer
SPECTRALINEAR [SpectraLinear Inc]
Datasheet
Rev 1.0, November 20, 2006
Byte 1: Clock Enable Register 2
Byte 2: Clock Spread Spectrum Control Register
Table 4. Charge Pump Control
Notes:
1. The bandwidth of the non-spread PLL is 80 KHz.
2. Glitch free operation for both enabling and disabling Spread Spectrum
SST1
Bit
Bit
0
0
1
1
7
6
5
4
3
2
1
0
7
6
5
4
3
2
1
0
SST0
0
1
0
1
@Pup
@Pup
1
1
1
1
1
1
1
1
0
0
0
0
0
1
0
0
% Spread
100%
114%
143%
88%
[1]
MSTRSRD
CPNTRL1
CLKG1_0
CLKG1_1
CLKG1_2
CLKG1_3
CLKG2_0
CLKG2_1
SWFSEL
CLKG3
Name
Name
SST1
SST0
REF
PLL Bandwidth
18 to 20 KHz
21 to 23 KHz
24 to 26 KHz
15 to 17 KHz
1 = enabled, 0 = tri-state
1 = enabled, 0 = tri-state
1 = enabled, 0 = tri-state
1 = enabled, 0 = tri-state
1 = enabled, 0 = tri-state
1 = enabled, 0 = tri-state
1 = enabled, 0 = tri-state
1 = enabled, 0 = tri-state
B2b7, B2b6: 00 = normal, 01 = testb_output, 10 = PD_resetb, 11 = normal
Charge Pump Control Bit1. See Table 4. Refer to CPNTRL0 in Byte 4, bit
0.
CLK output strength, 0 = low, 1 = high.
0=GFS(3:0) controls output frequency. 1 =I
frequency. Output frequencies should be set in Clock Frequency Select
Registers before enabling them.
Master Spread Spectrum Enable. 1 = enabled, 0 = disabled.
SST1 Select spread percentage. See Table 5
SST0 Select spread percentage. See Table 5
Table 5. Spread Spectrum Table
SST1
0
0
1
1
SST0
0
1
0
1
Description
Description
–0.25% Down spread Lexmark profile
–0.50% Down spread Lexmark profile
–1.0% Down spread Lexmark profile
–1.0% Down spread Linear profile
2
C selection of output
[2]
% Spread
CY28510
Page 5 of 12

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