88e3015 Marvell Semiconductor, Inc., 88e3015 Datasheet - Page 36

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88e3015

Manufacturer Part Number
88e3015
Description
Integrated 10/100 Fast Ethernet Transceiver
Manufacturer
Marvell Semiconductor, Inc.
Datasheet

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2.6 Hardware Configuration
The 88E3015/88E3018 devices are configured by tying LED[2:0], CRS, COL, VDDO, or VSS to CONFIG[3:0].
After the deassertion of RESET the 88E3015/88E3018 will be hardware configured.
The CONFIG pins should not be left floating.
The LED, CRS, and COL outputs a bit stream during initialization that is used by the CONFIG pin inputs. The bit
values are latched at the deassertion of hardware reset. The bit stream mapping is shown in
Doc. No. MV-S103657-00, Rev. C
Page 36
Note
LED[2], CRS, and COL should not be tied to CONFIG[2:0]. Use VDDO to set bits [1:0] of CONFIG[2:0] to
’11’.
88E3015/88E3018
Integrated 10/100 Fast Ethernet Transceiver
Document Classification: Proprietary Information
Table 17:
P i n
VSS
LED[0]
LED[1]
LED[2]
CRS
COL
VDDO
CONFIDENTIAL
Three bit Mapping
B i ts 2 ,1 , 0
000
001
010
011
100
110
111
October 26, 2006, Advance
Copyright © 2006 Marvell
Table 17

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