88e3015 Marvell Semiconductor, Inc., 88e3015 Datasheet - Page 56

• Manufacturer Part Number: 88e3015
• Description: Integrated 10/100 Fast Ethernet Transceiver
• Manufacturer: Marvell Semiconductor, Inc.

Section 3. Register Description
The IEEE defines only 32 registers address space for the PHY. In order to extend the number of registers address
space available a paging mechanism is used. For register address 30, register 29 bits 4 to 0 are used to specify
the page. There is no paging for registers 1 and 28.
In this document, the short hand used to specify the registers take the form register_page.bit:bit, register_page.bit,
register.bit:bit, or register.bit.
For example:
Register 30 page 9 bits 15 to 8 are specified as 30_9.15:8.
Register 30 page 9 bit 0 is specified as 30_9.0.
Register 2 bit 3 to 0 is specified as 2.3:0.
Note that in this context the setting of the page register (register 29) has no effect.
Register 2 bit 3 is specified as 2.3.
Doc. No. MV-S103657-00, Rev. C
Page 56
88E3015/88E3018
Integrated 10/100 Fast Ethernet Transceiver
Document Classification: Proprietary Information
CONFIDENTIAL
October 26, 2006, Advance
Copyright © 2006 Marvell