FW82801E Intel, FW82801E Datasheet - Page 33

• Manufacturer Part Number: FW82801E
• Description: Communications I/O Controller Hub
• Manufacturer: Intel

Advance Information Datasheet
Table 6.
82801E C-ICH Signal Description (Sheet 9 of 11)
SIU_LFRAME#
SIU_LAD[3:0]
SIU_RESET#
SIU_SERIRQ
SIU_LDRQ#
SIU0_DCD#
SIU1_DCD#
SIU0_DSR#
SIU1_DSR#
SIU0_CTS#
SIU1_CTS#
SIU0_DTR#
SIU1_DTR#
SIU_LCLK
SIU0_RI#
SIU1_RI#
Signal
Type
I/O
I/O
O
O
I
I
I
I
I
I
I
SIU LPC Multiplexed Command, Address, Data: Internal pull-ups are
provided.
SIU LPC clock input to SIU: 33 MHz LPC clock.
SIU LPC Serial DMA/Master Request Output: Used by SIU devices to
indicate a DMA request. These signals have weak internal pull-up resistors to
avoid external glue.
SIU LPC Frame: Indicates the start of an LPC cycle, or an abort.
SIU Reset: This signal should be tied to PCI RESET.
SIU Serial IRQ input: This pin receives the serial interrupt protocol from
external devices. Pull up if unused.
Clear To Send: Active low, this pin indicates that data can be exchanged
between CICH and external interface. These pins have no effect on the
transmitter.
NOTE: These pins could be used as Modem Status Input whose condition
Data Carrier Detect for UART0 and UART1: Active low, this pin indicates
that data carrier has been detected by the external agent.
NOTE: These pins are Modem Status Inputs whose condition can be tested
Data Set Ready for UART0 and UART1: Active low, this pin indicates that
the external agent is ready to communicate with 82801E C-ICH UARTs.
These pins have no effect on the transmitter.
NOTE: These pins could be used as Modem Status Inputs whose condition
Data Terminal Ready for UART0 and UART1: When low these pins informs
the modem or data set that CICH UART 0, 1 are ready to establish a
communication link. The DTR#x(x=0,1) output signals can be set to an active
low by programming the DTRx (x-0,1) (bit0) of the Modem control register to a
logic ‘1’. A Reset operation sets this signal to its inactive state (logic ‘1’).
LOOP mode operation holds this signal in its inactive state.
Ring Indicator for UART0 and UART1: Active low, this pin indicates that a
telephone ringing signal has been received by the external agent.
NOTE: These pins are Modem Status Input whose condition can be tested
can be tested by the processor by reading bit 4 (CTS) of the Modem
Status register (MSR). Bit 4 is the complement of the CTS# signal.
Bit 0 (DCTS) of the MSR indicates whether the CTS# input has
changed state since the previous reading of the MSR. When the CTS
bit of the MSR changes state an interrupt is generated if the Modem
Status Interrupt is enabled.
by the processor by reading bit 7 (DCD) of the Modem Status register
(MSR). Bit 7 is the complement of the DCD# signal. Bit 3 (DDCD) of
the MSR indicates whether the DCD# input has changed state since
the previous reading of the MSR. When the DCD bit of the MSR
changes state an interrupt is generated if the Modem Status Interrupt
is enabled.
can be tested by the processor by reading bit 5 (DSR) of the Modem
Status register. Bit 5 is the complement of the DSR# signal. Bit 1
(DDSR) of the Modem status register (MSR) indicates whether the
DSR# input has changed state since the previous reading of the
MSR. When the DSR bit of the MSR changes state an interrupt is
generated if the Modem Status Interrupt is enabled.
by the processor by reading bit 6 (RI) of the Modem Status register
(MSR). Bit 6 is the complement of the RI# signal. Bit 2 (TERI) of the
MSR indicates whether the DCD# input has changed state since the
previous reading of the MSR. When the RI bit of the MSR changes
state an interrupt is generated if the Modem Status Interrupt is
enabled.
Description
Intel
®
82801E C-ICH
33