ADV7160 Analog Devices, ADV7160 Datasheet - Page 32

• Manufacturer Part Number: ADV7160
• Description: 96-Bit/ 220 MHz True-Color Video RAM-DAC
• Manufacturer: Analog Devices

ADV7160/ADV7162
DIGITAL-TO-ANALOG
CONVERTER (DACS) AND
VIDEO OUTPUTS
The ADV7160/ADV7162 contains three high speed video
DACs. The DAC outputs are represented as the three primary
analog color signals IOR (red video), IOG (green video) and
IOB (blue video).
DACs and Analog Outputs
The part contains three matched 10-bit digital-to-analog con-
verters. The DACs are designed using an advanced, high speed,
segmented architecture. The bit currents corresponding to each
digital input are routed to either IOR, IOG, IOB (bit = “1”) or
GND.
The analog video outputs are high impedance current sources.
Each of the these three RGB current outputs are specified to di-
rectly drive a 37.5
Reference Input and R
An external 1.23 V voltage reference is required to set up the
analog outputs of the ADV7160/ADV7162. The reference volt-
age is connected to the V
A resistor R
and ground. For specified performance, R
280 . This corresponds to the generation of RS-343A video
levels (with SYNC on IOG and Pedestal = 7.5 IRE) into a dou-
bly terminated 75
value of 3996 and is set using CR43 and CR44 of Command
Register 4. Figure 47 illustrates the resulting video waveform
and the Video Output Truth Table illustrates the corresponding
control input stimuli. On the ADV7160/ADV7162 SYNC can
be encoded on any of the analog signals, however in practice,
SYNC is generally encoded on either the IOG output or on all
of the video outputs.
SET
is connected between the R
*
THESE BITS ARE READ-ONLY
RESERVED BITS.
A READ CYCLE WILL RETURN
ZEROS "00."
load. In this example DAC Gain has a
load (doubly terminated 75 ).
CCR9
SET
RESERVED*
REF
input.
CCR8
Figure 45. Cursor Control Register (CCR) (CCR9–CCR0)
CCR7
SET
SET
input of the part
has a value of
BE WRITTEN TO
ZERO SHOULD
THESE BITS
CCR7–CCR4
CCR6
(0000)
CCR5
–32–
CCR3
0
1
(SOURCE TERMINATION)
OUTPUT WITHOUT
CCR4
SYNC ENCODED
Figure 47. Composite Video Waveform SYNC Decoded;
CURSOR CONTROL
Pedestal = 7.5 IRE; DAC Gain = 3996
DACs
19.05
mA
1.44
NONINTERLACED
INTERLACED
0
0.714
0.054
IOR, IOG, IOB
V
0
CCR3
Figure 46. DAC Output Termination
(Doubly Terminated 75
Z S = 75
SYNC ENCODED
26.67
9.05
7.62
OUTPUT WITH
mA
0
CCR2
0
1
CURSOR ENABLE
1.000
0.340
0.286
V
0
CCR2
92.5 IRE
40 IRE
DISABLE
ENABLE
7.5 IRE
CCR1 CCR0
0
0
1
1
CURSOR MODE
CCR1
0
1
0
1
Control
Z
(CABLE)
RESERVED
X11 CURSOR
XGA CURSOR
RESERVED
O
= 75
CCR0
Load)
Z
(MONITOR)
REV. 0
L
= 75
WHITE
LEVEL
BLACK
LEVEL
BLANK
LEVEL
SYNC
LEVEL