EPM570 Altera, EPM570 Datasheet - Page 54

• Manufacturer Part Number: EPM570
• Description: MAX II Device Family
• Manufacturer: Altera

In System Programmability
3–8
MAX II Device Handbook, Volume 1
down-time costs for remote or field upgrades. The updated CFM block
configures the new design into the SRAM upon the next power cycle. It is
also possible to execute an immediate configuration of the SRAM without
a power cycle by using a specific sequence of ISP commands. The
configuration of SRAM without a power cycle takes a specific amount of
time (t
pulled-up to V
Design Security
All MAX II devices contain a programmable security bit that controls
access to the data programmed into the CFM block. When this bit is
programmed, design programming information, stored in the CFM
block, cannot be copied or retrieved. This feature provides a high level of
design security because programmed data within flash memory cells is
invisible. The security bit that controls this function, as well as all other
programmed data, is reset only when the device is erased. The SRAM is
also invisible and cannot be accessed regardless of the security bit setting.
The UFM block data is not protected by the security bit and is accessible
through JTAG or logic array connections.
Programming with External Hardware
MAX II devices can be programmed by downloading the information via
in-circuit testers, embedded processors, the Altera
MasterBlaster™, ByteBlaster™ II, and USB-Blaster cables, and through
the universal serial bus (USB)-based Altera Programming Unit (APU)
with the appropriate adapter.
BP Microsystems, System General, and other programming hardware
manufacturers provide programming support for Altera devices. Check
their web sites for device support information.
CONFIG
Core Version a.b.c variable
). During this time, the I/O pins are tri-stated and weakly
CCIO
.
®
ByteblasterMV™,
Altera Corporation
December 2004