MC6800 Motorola, MC6800 Datasheet - Page 29

• Manufacturer Part Number: MC6800
• Description: 8-BIT MICROPROCESSING UNIT (MPU)
• Manufacturer: Motorola

BCC
BCS
BE Q $~@\$~<. BRA
BG5
B&?$~’*RM I
Note 1.
BS ~:
‘t.,A:” ~ -
and I nstruc,$~~ “r’’’*’f Cycles
Address Mod.@x,.,.j:, ‘
,@&~@>>@~ L
&&T
BH#~’B~b’
If device which is addressed during this cycle uses
Depending
;;:
{t
\*>: .+
,. i.>~:+,,
‘: .>,.$’{,,
on bus capacitance,
...
..,$~~ ,>? . +..
@
.,.y#
?k,\*a\.
,,.
(PC + 2)
.
4
8
ADDR
. .
Pc
MOTOROLA
.
1,’
. .3
+ OFFSET
t
cycle
Next Instr.
TABLE 10 – RELATIVE MODE CYCLE-BY-CYCLE OPERATION
= INOX
. . .
..,.
PrOaram
MeGory
+
2
4
1
3
2
3
4
5
6
8
Offset
1
7
RAM
Instr.
MPU
data from the previous cycle may be retained on the Oata Bus.
FIGURE 32 – RELATIVE ADDRESSING
VMA
Line
-~
OFFSET<
0
1
1
0
0
0
0
0
1
1
1
1
MPu
1
OP Code Address
Op Code Address + 1
Op Code Address t 2
Branch Address
OP Code Address
Op Code Address+
Stack Pointer
Stack Pointer – 1
Stack Pointer – 2
Return Address of Main Program
Subroutine
Return Address of Main Program
255
. . ..-.
VMA,
i
Pc
Pc
Address
Address Bus
tnen tne UaTa Bus
Semiconductor
29
5008
5010
1
. .
a
s
.
Next Instr.
Program
Memorv
.
BEQ
MPU
~AM
15
-.,
MODE
WIII
.
go TO tne
RIG
Line
.
0
1
1
1
1
1
o
1
1
1
1
1
Products Inc.
. ,,
Op Code
Branch Offset
Op Code
Irrelevant
Irrelevant
Branch Offset
Return
Return
Irrelevant
Irrelevant
Irrelevant
Irrelevant
nlgn !mpeaance
.,.
Address (Low Order Byte)
Address (High Order Byte)
Data (Note 1 )
Data (Note 1 )
Data (Note 1 )
Data (Note 1 )
Data (Note 1 )
Data (Note 1 )
,.,
Data Bus
~nree-staTe conut~!un.
. . . . . . .- —J.. ,-—
—
1