MC6800 Motorola, MC6800 Datasheet - Page 30

• Manufacturer Part Number: MC6800
• Description: 8-BIT MICROPROCESSING UNIT (MPU)
• Manufacturer: Motorola

I
—
JMP
ADC
ADD
AND
BIT
CMP
CPX
LDS
LDX
STA
ASL
ASR
CLR
COM
DEC
INC
;TS
3TX
INDEXED
Note 1.
Note 2.
and Instructions
Address Mode
NEG
ROL
ROR
TST
ORA
SBC
SUB
LSR
EOR
LDA
Oepending
For TST, VMA
If device which
on bus capacitance,
@
Cycles
= O and Operand
is addressed during this cycle uses VMA,
6
4
5
6
?
MOTOROLA
Cycle
8 —
T
T
T
‘q;
;@p
T
4
5
6
7
#
4
5
6
4
5
6
2
3$$
6
7
2
3
2
3
4
2
3
4
5
1
2
3
2
3
4
5
6
1
2
3
7
1
data from the previous cycle may be retained
VMA
T
Line
data does not change.
0
0
0
0
1
1
1
1
TABLE
Op Code Address
OP Code Address + 1
Op Code Address
Op Code Address + 1
Op Code Address
Op Code Address+
Index Register
Index Register Plus Offset
Index Register Plus Offset
Index Register Plus Offset + 1
?n. S,pt:+f
yt{\,
?
‘&p Code Address
Op Code Address
Op Code Address+
Stack Pointer
Stack Pointer – 1
Stack Pointer – 2
Index Register Plus Offset
Index Register
Index Register Plus Offset (w/o Carry)
Index Register
Index Register PI us Offset
Index Register Plus Offset
Op Code Address
Op Code Address’~~%?.?#~
Op Code Address+
Index Register
Index Register
Op Code Address
Op Code Address + 1
Index Register Plus Offset
Index Register Plus Off@F?:~
Index Register
Index ReQ&er
Index ~{gf$~~{ Plus Offset
I nde~l.%~,~ter
t#d,*
Index Register
Index Register Plus Offset
Index Register Plus Offset
Index Register Plus Offset
Index Resister Plus Offset + 1
Index Register
Index Register Plus Offset ,,:~j,
.;$:,>~: . ,!
.- ‘.~$+t
11 –
“
R*gister Plus Offset
INDEXEO
,...,,,,,
Address Bus
Pyus Offset (w/o Carry)
PI us Offset
then the Data Bus will go to the high impedance
30
Semiconductor
,
MOOE
~ ~., ~;,\
1
1
1
‘i:%,>. :.. ,>{: \“ , ~b-
‘.:
kTi\$ $:~t
CYCLE-BY-CYCLE
(w/o Carry)
(w/o Carry)
(w/o Carry)
(w/o *~/Y)
(w/o Carry)
$.\\$&h
,$<i?!
’.”.,,
,,+y:>,
‘k
B:#
.7>.,,
on the Oata Bus.
,,,,
R 1~
Line
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
Products
~~y
~~~$rand Data (Low Order Byte)
lg{&,~@van#Data (Note 1)
,’
Op Code
Offset
Return Address (High Order Byte)
Irrelevant
Offset
Operand
Operand
Irrelevant
Return Address ( Low Order Byte)
Irrelevant
Irrelevant
Offset
Current Operand
New Operand
Op Code
Irrelevant
Irrelevant
Irrelevant
Op Code
Offset
Irrelevant
Operand
Op Code
Irrelevant
Irrelevant
Irrelevant
Irrelevant
Irrelevant
Data (High Order Byte)
Data ( High Order Byte)
Data ( Low Order Byte)
Data
Data (Note 1 )
Data (Note 1 )
Oata (Note 1 )
Data (Note 1 )
Data (Note 1 )
Data (Note 1 )
Data (Note 1 )
Data (Note 1 )
Data (Note 1 )
Data (Note 1 )
Data (Note 1 )
Data (Note 1 )
Oata (Note 1 )
Inc.
three-state
Data (Note 2)
Deta Bus
Data
condition.
I