Z80181 Zilog., Z80181 Datasheet - Page 37
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Z80181
Manufacturer Part Number
Z80181
Description
SMART ACCESS CONTROLLER (SAC)
Manufacturer
Zilog.
Datasheet
1.Z80181.pdf
(74 pages)
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Zilog
DS971800500
Write Register 0 (non-multiplexed bus mode)
D7 D6 D5 D4 D3 D2 D1 D0
0
0
1
1
*
With Point High Command
0
1
0
1
Null Code
Reset Rx CRC Checker
Reset Tx CRC Generator
Reset Tx Underrun/EOM Latch
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
Null Code
Point High
Reset Ext/Status Interrupts
Send Abort (SDLC)
Enable Int on Next Rx Character
Reset Tx Int Pending
Error Reset
Reset Highest IUS
(a)
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
Figure 50. Write Register Bit Functions
Register 0
Register 1
Register 2
Register 3
Register 4
Register 5
Register 6
Register 7
Register 8
Register 9
Register 10
Register 11
Register 12
Register 13
Register 14
Register 15
*
Write Register 1
D7 D6 D5 D4 D3 D2 D1 D0
Write Register 2
D7 D6 D5 D4 D3 D2 D1 D0
0
0
1
1
0
1
0
1
Rx Int Disable
Rx Int On First Character or
Special Condition
Int On All Rx Characters or
Special Condition
Rx Int On Special Condition Only
(b)
(c)
S
MART
A
Ext Int Enable
Tx Int Enable
Parity is Special
Condition
WAIT/DMA Request
On Receive//Transmit
/WAIT/DMA Request
Function
WAIT/DMA Request
Enable
CCESS
V0
V1
V2
V3
V4
V5
V6
V7
C
ONTROLLER
Interrupt
Vector
Z80181
2-37
SAC
™