XC7336-10 Xilinx, XC7336-10 Datasheet - Page 3

• Manufacturer Part Number: XC7336-10
• Description: 36-Macrocell CMOS EPLD
• Manufacturer: Xilinx

Figure 3. Fast Function Block Product Term Assignment
Product Term Assignment
Each Macrocell sum-of-product OR gate can be ex-
panded using the Export product-term assignment fea-
ture. The Export function transfers product-terms in incre-
ments of four from one Macrocell to the neighboring
Macrocell (Figure 3). Complex logic functions requiring up
to 36 product-terms can be implemented using all nine
Macrocells within the Fast Function Block. When product-
terms are assigned to adjacent Macrocells, the product-
term normally dedicated to the Set or Reset function
becomes the input to the Macrocell register.
Universal Interconnect Matrix
The UIM receives input from Macrocell outputs, I/O pins,
and dedicated input pins. Acting as an unrestricted cross-
bar switch, the UIM generates 24 output signals to each
From Previous
Macrocell
4
4
Polarity
Output
Single-Product Term Assignment
Eight-Product Term Assignment
Output
Polarity
D/T
D/T
S/R
Q
Q
X3374
2-25
Fast Function Block. Each UIM input can be programmed
to connect to any UIM output. The delay through the inter-
connect matrix is constant.
When multiple inputs are programmed to be connected to
the same output, this output produces the logical AND of the
input signals. By choosing the appropriate signal polarities
at the input pins, Macrocell outputs and Fast Function Block
AND-array inputs, this AND logic can also be used to imple-
ment wide NAND, OR or NOR functions. This offers an addi-
tional level of logic without additional speed penalty.
3.3 V or 5 V Interface Configuration
The XC7336 can be used in systems with two different
supply voltages: 3.3 V and 5 V. Each XC7336 device has
separate V
to the I/O pads (V
nected
3.3 V or 5 V, depending on the output interface require-
ment.
When V
TTL levels, and thus compatible with 3.3 V and 5 V logic.
The output High levels are also TTL compatible. When
V
TTL levels, and the outputs pull up to the 3.3 V. This
makes the XC7336 ideal for interfacing directly to 3.3 V
components. In addition, the output structure is designed
so that the I/O can also safely interface to a mixed 3.3 V
and 5 V bus simultaneously.
Low Power (Q) Devices
The XC7336-10, -12 and -15 are available in a low power
variant, designated the XC7336Q.
Timing parameters for the XC7336 and the XC7336Q
devices are identical. However, the XC7336Q features
much lower power consumption. Using the XC7336Q will
prove advantageous to any system design where power
consumption and EM emissions are critical system
parameters.
CCIO
is connected to 3.3 V, the input thresholds are still
CCIO
to a 5 V supply. V
CC
is connected to 5 V, the input thresholds are
connections to the internal logic (V
CCIO
). V
CCIO
CCINT
may be connected to either
must always be con-
CCINT
) and