XC7336-10 Xilinx, XC7336-10 Datasheet - Page 5

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XC7336-10

Manufacturer Part Number
XC7336-10
Description
36-Macrocell CMOS EPLD
Manufacturer
Xilinx
Datasheet

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Notice: The information contained in this data sheet pertains to products in the initial production phases of development.
These specifications are subject to change without notice. Verify with your local Xilinx sales office that you have the latest
data sheet before finalizing a design.
Absolute Maximum Ratings
Warning : Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device.
These are stress ratings only, and functional operation of the device at these or any other conditions beyond those listed
under Recommended Operating Conditions is not implied. Exposure to Absolute Maximum Ratings conditions for
extended periods of time may affect device reliability.
Recommended Operating Conditions
Here are just a few of the XEPLD Development System
features:
• Automatic Optimization and Mapping
• Automatic use of UIM Resources – SMARTswitch
Designs are automatically minimized and mapped into
the devices for optimal efficiency and high
performance. Critical logic functions are automatially
assigned to special resources such as high speed
clocks and global output enable signals. This allows
the user to concentrate on design functionality without
concern for physical implementation
The Universal Interconnect Maticx (UIM) used in Xilinx
EPLDs provides an additional level of logic at no
additional delay. XEPLD automatically uses the
inherent logic capability of the UIM when possible to
reduce Macrocell requirements and increase speed.
Symbol
V
V
V
V
V
V
T
Symbol
V
V
V
T
T
IN
CCINT
CCIO
CCIO
IL
IH
O
STG
SOL
CC
IN
TS
/
Parameter
Supply voltage relative to GND
Supply voltage relative to GND
Supply voltage relative to GND
I/O supply voltage relative to GND
Low-level input voltage
High-level input voltage
Output voltage
Input signal transition time
Supply voltage with respect to GND
DC Input voltage with respect to GND
Voltage applied to 3-state output with respect to GND
Storage temperature
Maximum soldering temperature (10s @ 1/16 in. = 1.5 mm)
Parameter
Commercial
Industrial
Military
2-27
T
• N-to-1 PAL Conversion Utility
• Complete Design Control
• Multiple Platform Support
A
= -55
XEPLD automatically combines 20- and 24-pin
standard PAL files into one top-level design file,
checks for errors, and compiles the design into one or
more EPLDs. The N-to-1 PAL converter is ideal for
one step logic consolidation and board space
reduction.
Users have the option to override the automatic
features of XEPLD and selectively control any or all
device resources.
XEPLD runs on IBM Compatible PCs, Sun, HP700,
and IBM RS6000 platforms.
T
o
A
C to T
T
= -40
A
= 0
C
o
o
C to 70
C to 85
= +125
o
o
o
C
C
C
-0.5 to V
-0.5 to V
Min
-65 to +150
4.75
4.50
4.50
3.0
0
2.00
0
-0.5 to 7.0
Value
+250
CC
CC
V
CC
+0.5
+0.5
V
Max
CCIO
50
5.25
5.50
5.50
0.80
3.60
+0.5
Units
Units
V
V
V
C
C
ns
V
V
V
V
V
V
V

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