MBM29F040C-55 FUJITSU [Fujitsu Component Limited.], MBM29F040C-55 Datasheet - Page 10

• Manufacturer Part Number: MBM29F040C-55
• Description: 4M (512K X 8) BIT
• Manufacturer: FUJITSU [Fujitsu Component Limited.]

10
* : Outputs 01H at protected sector addresses and 00H at unprotected sector addresses.
Write
Sector Protection
MBM29F040C
Manufacture’s
Code
Device Code
Sector
Protection
Device erasure and programming are accomplished via the command register. The contents of the register serve
as inputs to the internal state machine. The state machine outputs dictate the function of the device.
The command register itself does not occupy any addressable memory location. The register is a latch used to
store the commands, along with the address and data information needed to execute the command. The
command register is written by bringing WE to V
the falling edge of WE or CE, whichever happens later; while data is latched on the rising edge of WE or CE,
whichever happens first. Standard microprocessor write timings are used.
Refer to AC Write Characteristics and the Erase/Programming Waveforms for specific timing parameters.
The MBM29F040C features hardware sector protection. This feature will disable both program and erase
operations in any number of sectors (0 through 8). The sector protection feature is enabled using programming
equipment at the user’s site. The device is shipped with all sectors unprotected.
To activate this mode, the programming equipment must force V
V
Table 4 defines the sector address for each of the eight (8) individual sectors. Programming of the protection
circuitry begins on the falling edge of the WE pulse and is terminated with the rising edge of the same. Sector
addresses must be held constant during the WE pulse. See figures 11 and 17 sector protection waveforms and
algorithm.
Sector Address
ID
= 11.5 V) and CE = V
Type
SA0
SA1
SA2
SA3
SA4
SA5
SA6
SA7
Table 3
A
X
X
18
Addresses
Sector
A
IH
X
X
17
. The sector addresses (A
-55/-70/-90
MBM29F040C Sector Protection Verify Autoselect Codes
A
0
0
0
0
1
1
1
1
A
18
X
X
16
Table 4
V
V
V
A
IL
IL
IL
6
V
A
V
V
IH
IL
IL
1
A
0
0
1
1
0
0
1
1
Sector Address Tables
17
IL
, while CE is at V
V
V
V
A
IH
IL
IL
0
18
, A
(HEX) DQ
Code
01H*
04H
A4H
17
and A
A
0
1
0
1
0
1
0
1
ID
16
0
1
0
on address pin A
16
7
) should be set to the sector to be protected.
IL
and OE is at V
DQ
0
0
0
6
DQ
0
1
0
5
DQ
9
00000H to 0FFFFH
10000H to 1FFFFH
20000H to 2FFFFH
30000H to 3FFFFH
40000H to 4FFFFH
50000H to 5FFFFH
60000H to 6FFFFH
70000H to 7FFFFH
IH
and control pin OE, (suggest
0
0
0
Address Range
. Addresses are latched on
4
DQ
0
0
0
3
DQ
1
1
0
2
DQ
0
0
0
1
DQ
0
0
1
0